Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 9 - Arrangements for programme control, e.g. control unit
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
11/1996
11/13/1996EP0742519A2 Memory allocation maintaining ordering across multiple heaps
11/13/1996EP0742518A2 Compiler and processor for processing loops at high speed
11/13/1996EP0742517A2 A program translating apparatus and a processor which achieve high-speed execution of subroutine branch instructions
11/13/1996EP0742516A2 Device for putting into operation an integrated circuit
11/13/1996EP0742515A2 Method for putting into operation an integrated circuit
11/13/1996EP0742514A1 Method of checking the execution status of a macro
11/13/1996EP0742513A2 A processor which returns from subroutine at high speed and a program translating apparatus which generates machine programs that makes a high-speed return from a subroutine
11/13/1996EP0742512A2 Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor
11/13/1996CN1135800A Microcontroller with a reconfigurable program status word
11/13/1996CN1135617A Supporting system for algorithmic language education
11/12/1996US5574946 Data transmission system using independent adaptation processes associated with storage unit types for directly converting operating system requests to SCSI commands
11/12/1996US5574942 Hybrid execution unit for complex microprocessor
11/12/1996US5574941 In a data processor
11/12/1996US5574939 Multiprocessor coupling system with integrated compile and run time scheduling for parallelism
11/12/1996US5574935 Superscalar processor with a multi-port reorder buffer
11/12/1996US5574933 Task flow computer architecture
11/12/1996US5574928 Mixed integer/floating point processor core for a superscalar microprocessor with a plurality of operand buses for transferring operand segments
11/12/1996US5574927 RISC architecture computer configured for emulation of the instruction set of a target computer
11/12/1996US5574926 One-chip microcomputer system having function for substantially correcting contents of program
11/12/1996US5574925 Asynchronous pipeline having condition detection among stages in the pipeline
11/12/1996US5574924 Vector processing device that utilizes post marks to ensure serialization of access requests of vector store instructions
11/12/1996US5574923 Method and apparatus for performing bi-endian byte and short accesses in a single-endian microprocessor
11/12/1996US5574922 Processor with sequences of processor instructions for locked memory updates
11/12/1996US5574918 Method and apparatus for configuring computer program from available subprograms
11/12/1996US5574917 Method for information communication between concurrently operating computer programs
11/12/1996US5574915 Object-oriented booting framework
11/12/1996US5574914 Method and apparatus for performing system resource partitioning
11/12/1996US5574911 In a computer-based multimedia system
11/12/1996US5574904 Database management system in an intelligent network using a common request data format
11/12/1996US5574901 Method and apparatus for object traversing suitable for structured memory formed by linked objects
11/12/1996US5574899 Generation number managing apparatus for adjusting generation numbers among processors or program files
11/12/1996US5574898 Dynamic software version auditor which monitors a process to provide a list of objects that are accessed
11/12/1996US5574889 Apparatus for selecting and evaluating design based on stored information
11/12/1996US5574888 A method and apparatus for establishing compatibility between communication applications producing at commands and a telephony application programming interface
11/12/1996US5574887 Apparatus and method for emulation routine pointer prefetch
11/12/1996US5574883 Single chip processing unit providing immediate availability of frequently used microcode instruction words
11/12/1996US5574878 Method of parallel purging of translation lookaside buffer in a multilevel virtual machine system
11/12/1996US5574873 Decoding guest instruction to directly access emulation routines that emulate the guest instructions
11/12/1996US5574872 Method and apparatus for controlling the saving of pipelines in pipelined processors during trap handling
11/12/1996US5574871 Method and apparatus for implementing a set-associative branch target buffer
11/12/1996US5574867 Fast first-come first served arbitration method
11/12/1996US5574854 Method and system for simulating the execution of a computer program
11/12/1996US5574849 Synchronized data transmission between elements of a processing system
11/12/1996US5574843 Methods and apparatus providing for a presentation system for multimedia applications
11/12/1996US5574837 Method of generating a browser interface for representing similarities between segments of code
11/12/1996US5574826 Memory organization method for a fuzzy logic controller and corresponding device
11/12/1996CA2066011C Interruption circuit operable at a high speed
11/09/1996CA2173819A1 Memory allocation maintaining ordering across multiple heaps
11/07/1996WO1996035170A1 Dynamic device matching using driver candidate lists
11/07/1996WO1996035168A1 Method and apparatus for the dispatching of interrupts
11/07/1996WO1996035167A1 System and method for providing cooperative interrupts in a preemptive task scheduling environment
11/07/1996WO1996035165A1 Instruction memory limit check in microprocessor
11/07/1996WO1996026484A3 Graphical environment for managing and developing applications
11/06/1996EP0741358A2 Microcomputer
11/06/1996EP0741356A1 Cache architecture and method of operation
11/06/1996EP0692112B1 Dynamic browser system
11/06/1996EP0689693B1 Object-oriented operating system
11/06/1996EP0689692B1 Dynamic linking system
11/06/1996EP0672276B1 Object-oriented audio system
11/06/1996EP0667972B1 Collaborative work system
11/06/1996CN1135264A Multi-region fuzzy logic control system with auxiliary variables
11/06/1996CN1135127A Remotely renewable subscription information processor
11/05/1996US5572733 Data processing system which executes composite objects by combining existing objects
11/05/1996US5572732 Method and system for process expression and resolution including a general method of direct association
11/05/1996US5572731 Sequentially navigated object oriented computer system
11/05/1996US5572730 Storage management method in an information processing system
11/05/1996US5572727 Computer system
11/05/1996US5572720 Method of extending capacity of a microprocessor timer
11/05/1996US5572714 Integrated circuit for pipeline data processing
11/05/1996US5572713 System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders
11/05/1996US5572711 Mechanism for linking together the files of emulated and host system for access by emulated system users
11/05/1996US5572709 Using dynamically-linked libraries to add side effects to operations
11/05/1996US5572706 Electronic equipment having controllable access times for detachable cartridges
11/05/1996US5572690 Cascaded multistage counterflow pipeline processor for carrying distinct data in two opposite directions
11/05/1996US5572689 Data processing system and method thereof
11/05/1996US5572682 Control logic for a sequential data buffer using byte read-enable lines to define and shift the access window
11/05/1996US5572680 Method and apparatus for processing and transferring data to processor and/or respective virtual processor corresponding to destination logical processor number
11/05/1996US5572672 Method and apparatus for monitoring data processing system resources in real-time
11/05/1996US5572667 Interrupt processing device for controlling the timing of an interrupt signal initiated by a debugging break point in an instruction code
11/05/1996US5572652 System and method for monitoring and controlling one or more computer sites
11/05/1996US5572649 Process for dynamically switching between a single top level window and multiple top level windows
11/05/1996US5572644 System and methods for multi-dimensional information processing
11/05/1996US5572572 Computer and telephone apparatus with user friendly interface and enhanced integrity features
11/05/1996US5572479 Semiconductor integrated circuit having a synchronous type memory
11/05/1996US5572453 Pipeline signal processor
10/1996
10/31/1996WO1996034346A1 Microprocessor with distributed registers accessible by programmable logic device
10/31/1996WO1996034335A1 Apparatus for detecting and executing traps in a superscalar processor
10/31/1996DE4309532C2 Verfahren zum Sichern einer Systemabbildung eines Computersystems auf einer permanenten Speichereinrichtung sowie ein Computersystem Method of securing a system image of a computer system on a permanent storage device and a computer system
10/31/1996DE19531635C1 Sorting method for linguistic input parameter relations
10/30/1996EP0740258A2 Data management system
10/30/1996EP0740251A2 Optimization apparatus for removing hazards by arranging instruction order
10/30/1996EP0740250A2 Apparatus for dynamically reading and writing multiple object code formats through use of objective code readers and writers
10/30/1996EP0740249A1 Data processing device with coprocessor
10/30/1996EP0740248A1 Method and apparatus for detecting and executing traps in a superscalar processor
10/30/1996EP0740240A2 Numerical control unit
10/30/1996EP0740239A2 Numerical control
10/30/1996EP0740238A2 Numerical control unit
10/30/1996EP0739517A1 A massively miltiplexed superscalar harvard architecture computer
10/30/1996EP0739515A1 Data memory and processor bus
10/30/1996EP0671035A4 Software overload control method.
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