Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2009
10/07/2009CN201323566Y Clock recovering system
10/07/2009CN101552606A Intelligent self-calibration chip based on chip internal clock crystal oscillator and self-calibration method
10/07/2009CN101552468A Damping controller for restricting secondary synchronous oscillations and control method thereof
10/07/2009CN100547937C Tuner containing voltage adapter
10/07/2009CN100547933C System and method for clock signal synchronization
10/07/2009CN100547932C Clock recovering circuit for generating an output clock locked to an analog input signal and related method thereof
10/07/2009CN100547905C Circulation circuit voltage-controlled oscillator with temperature compensation effect
10/06/2009US7599677 Charge pump circuit having switches
10/06/2009US7599673 Receiver architectures utilizing coarse analog tuning and associated methods
10/06/2009US7599462 Hybrid analog/digital phase-lock loop with high-level event synchronization
10/06/2009US7599246 Delay locked loop implementation in a synchronous dynamic random access memory
10/06/2009US7598818 Temperature compensation for a voltage-controlled oscillator
10/06/2009US7598816 Phase lock loop circuit with delaying phase frequency comparson output signals
10/06/2009US7598815 Multiple frequency generator for quadrature amplitude modulated communications
10/06/2009US7598783 DLL circuit and method of controlling the same
10/06/2009CA2435404C Frequency searcher and frequency-locked data demodulator using a programmable rotator
10/01/2009WO2009118587A1 Phase lock loop circuit
10/01/2009WO2009055622A3 Dynamic biasing of a vco in a phase-locked loop
10/01/2009US20090244375 Circuit Arrangement and Method for Locking onto and/or Processing Data, in Particular Audio, T[ele]v[ision] and/or Video Data
10/01/2009US20090243740 Method and system for reduced jitter signal generation
10/01/2009US20090243736 Phase locked loop circuit and integrated circuit for the same
10/01/2009US20090243735 Frequency diverse discrete-time phase-lock device and apparatus
10/01/2009US20090243733 Design structure for transforming an input voltage to obtain linearity between input and output functions and system and method thereof
10/01/2009US20090243732 SDOC with FPHA & FPXC: System Design On Chip with Field Programmable Hybrid Array of FPAA, FPGA, FPLA, FPMA, FPRA, FPTA and Frequency Programmable Xtaless ClockChip with Trimless/Trimfree Self-Adaptive Bandgap Reference Xtaless ClockChip
10/01/2009US20090243731 Apparatus With Clock Generation Function, Method For Setting Reference Frequency, And Method For Adjusting Reference Frequency
10/01/2009US20090243681 Embedded Source-Synchronous Clock Signals
10/01/2009US20090243680 Data signal generating apparatus
10/01/2009US20090243679 Semi-Digital Delay Locked Loop Circuit and Method
10/01/2009US20090243678 Delay locked-loop circuit and display apparatus
10/01/2009US20090243677 Clock generator and methods using closed loop duty cycle correction
10/01/2009US20090243676 Design Structure For Fractional-N Phased-Lock-Loop (PLL) System
10/01/2009US20090243675 Optimization Method For Fractional-N Phased-Lock-Loop (PLL) System
10/01/2009US20090243674 Fractional-N Phased-Lock-Loop (PLL) System
10/01/2009US20090243673 Phase locked loop system and phase-locking method for phase locked loop
10/01/2009US20090243672 Multi-pole delay element delay locked loop (dll)
10/01/2009US20090243671 Disturbance suppression capable charge pump
10/01/2009US20090243670 Self-regulated charge pump with loop filter
10/01/2009US20090243669 Power-on reset circuit
10/01/2009US20090243657 Methods and apparatus for fast unbalanced pipeline architecture
10/01/2009DE102005039352B4 Schaltungsanordnung zur Erfassung einer Einrastbedingung eines Phasenregelkreises und Verfahren zum Bestimmen eines eingerasteten Zustandes eines Phasenregelkreises Circuit arrangement for detecting a Einrastbedingung a phase locked loop and method for determining a latched state of a phase locked loop
09/2009
09/30/2009EP1955439B1 Phased array radar systems and subassemblies thereof
09/30/2009CN101548467A 延迟线校准 Delay line calibration
09/30/2009CN101547296A Delay locked loop circuit and method
09/30/2009CN101547008A Frequency synthesizer covering ultra wideband 4 to 5GHz and 6 to 9GHz frequency points
09/30/2009CN101547007A Delay locked-loop circuit and display apparatus
09/30/2009CN101547006A Phase synchronization circuit
09/30/2009CN101547005A Oscillation adjusting circuit and oscillation adjusting method
09/30/2009CN100546193C Staged locking of two phase locked loops
09/30/2009CN100546192C Digital phase detector
09/29/2009US7596297 Information processing apparatus and method program, and recording medium
09/29/2009US7595921 Increasing profile accuracy and accelerating profile creation
09/29/2009US7595699 Look loop circuit and method having improved lock time
09/29/2009US7595698 PLL lock time reduction
09/29/2009US7595673 Clock signal generator
09/29/2009US7595672 Adjustable digital lock detector
09/29/2009US7595671 PLL circuit
09/29/2009US7595670 Electronic device and method for on chip skew measurement
09/29/2009CA2372072C Synchronization of ofdm signals with improved windowing
09/24/2009WO2009116262A1 Synthesizer and reception device
09/24/2009US20090238017 Digital dll circuit
09/24/2009US20090238016 Circuits to delay signals from a memory device
09/24/2009US20090237133 Switching control circuit for multi-channels and multi-phases power converter operated at continuous current mode
09/24/2009US20090237132 Phase-locked loop
09/24/2009US20090237131 Phase locked loop
09/24/2009US20090237130 Dual power-up signal generator
09/24/2009US20090237129 Semiconductor device and data processor
09/24/2009US20090237128 High frequency fractional-N divider
09/23/2009EP2104232A2 Phase interpolator for high-speed serial data transceiver systems and related methods
09/23/2009CN101542908A 数字pll装置 Digital pll device
09/23/2009CN101542907A Linear phase frequency detector and charge pump for phase-locked loop
09/23/2009CN101540606A Frequency synthesizer based on multi-channel sampling and frequency synthesis method
09/23/2009CN101540605A Delay-locked loop and a delay-locked loop detector
09/22/2009US7593499 Apparatus and method for low power routing of signals in a low voltage differential signaling system
09/22/2009US7592875 Injection-locked oscillator circuit
09/22/2009US7592874 Phase/frequency detector, phase locked loop, method for phase/frequency detection and method for generating an oscillator signal
09/22/2009US7592847 Phase frequency detector and phase-locked loop
09/22/2009US7592846 Method for using digital PLL in a voltage regulator
09/17/2009WO2009113466A1 Frequency synthesizer
09/17/2009WO2009083501A3 A phase locked loop
09/17/2009US20090234612 Parameter correction circuit and parameter correction method
09/17/2009US20090231050 Digital fractional-n phase lock loop and method thereof
09/17/2009US20090231046 Low spur phase-locked loop architecture
09/17/2009US20090231045 Frequency-locking device and frequency-locking method thereof
09/17/2009US20090231044 Voltage controlled oscillator having temperature detecting circuit
09/17/2009US20090231005 Phase Controllable Multichannel Signal Generator
09/17/2009US20090231004 Digital cycle controlled oscillator and method for controlling the same
09/17/2009US20090231003 Voltage controlled oscillator and pll and filter using the same
09/17/2009US20090231002 Power supply noise rejection in pll or dll circuits
09/17/2009US20090231001 Signal recovery circuit
09/17/2009US20090231000 Motherboard power on circuit
09/17/2009US20090230947 Semiconductor integrated circuit
09/17/2009US20090230946 Timing generator and semiconductor test apparatus
09/16/2009EP2101438A2 Communication system, receiver and reception method
09/16/2009EP2101414A1 Charge pump circuit and method
09/16/2009EP2101188A1 Multiple clock signal generation from a common oscillator
09/16/2009EP2100378A1 Digitally controlled analog frequency synthesizer
09/16/2009EP2100377A1 Programmable varactor for vco gain compensation and phase noise reduction
09/16/2009CN101536315A Zero-delay buffer with common-mode equalizer for input and feedback differential clocks into a phase-locked loop (pll)
09/16/2009CN101536314A Direct digital interpolative synthesis
09/16/2009CN101534187A Communication system, receiver and reception method