| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 07/02/2009 | US20090167386 Charge pumping circuit, clock synchronization circuit having the charge pumping circuit, and method for operating the clock synchronization circuit |
| 07/02/2009 | US20090167385 Phase locked loop device and control method thereof |
| 07/02/2009 | US20090167384 Dividing circuit and phase locked loop using the same |
| 07/02/2009 | US20090167383 Method for Generating a Clock Frequency |
| 07/02/2009 | US20090167382 PLL Apparatus |
| 07/02/2009 | US20090167381 Time Measurement of Periodic Signals |
| 07/02/2009 | US20090167380 System and method for reducing EME emissions in digital desynchronized circuits |
| 07/02/2009 | US20090167379 Method and Apparatus for Digital VCDL Startup |
| 07/02/2009 | US20090167378 Method and System for Providing a Power-On Reset Pulse |
| 07/02/2009 | US20090167377 Semiconductor storage device and resetting method for a semiconductor storage device |
| 07/02/2009 | US20090167376 System and method for pulse edge synchronization |
| 07/02/2009 | US20090167093 Systems and Circuits with Multirange and Localized Detection of Valid Power |
| 07/01/2009 | EP2075949A1 Clock data restoring device |
| 07/01/2009 | EP1277304B1 High-speed serial data transceiver systems and related methods |
| 07/01/2009 | EP1175761B1 Ofdm demodulator with phase correction of the i-q signals |
| 07/01/2009 | CN201266923Y GPS combined time frequency instrument |
| 07/01/2009 | CN201266922Y Acousto-optic driver base on direct digital synthesizing technology |
| 07/01/2009 | CN101472171A Data conversion system |
| 07/01/2009 | CN101471662A 6 to 8.2 GHz five-band frequency synthesizer for OFDM UWB |
| 07/01/2009 | CN101471661A 6.6 to 8.2 GHz four-band frequency synthesizer for OFDM UWB |
| 07/01/2009 | CN101471660A 6.3 to 8.5 GHz five-band frequency synthesizer for OFDM UWB |
| 07/01/2009 | CN101471659A 5.5 to 7.2 GHz four-band frequency synthesizer for OFDM UWB |
| 07/01/2009 | CN101471658A Phase locked loop device and control method thereof |
| 07/01/2009 | CN101471657A Whole digital PPL and control method thereof |
| 07/01/2009 | CN101471656A Clock generation devices and methods |
| 07/01/2009 | CN100508399C Phase and frequency detection circuits |
| 07/01/2009 | CN100508398C Phase detecting circuit having adjustable gain curve and method thereof |
| 07/01/2009 | CN100508397C Clock generating device based on lock-phase ring |
| 07/01/2009 | CN100508396C Phase-lock loop framework capable of avoiding frequency drift and jitter |
| 07/01/2009 | CN100508065C Duty cycle correction |
| 07/01/2009 | CN100506535C Circuit for clock interpolation |
| 06/30/2009 | US7555083 Synchronizing circuit for stably generating an output signal |
| 06/30/2009 | US7555038 Transmission system, signal receiver, test apparatus and test head |
| 06/30/2009 | US7554553 Graphics display system with anti-flutter filtering and vertical scaling feature |
| 06/30/2009 | US7554415 Microcomputer including a CR oscillator circuit |
| 06/30/2009 | US7554414 Fast starting circuit for crystal oscillators |
| 06/30/2009 | US7554413 Voltage controlled oscillator with compensation for power supply variation in phase-locked loop |
| 06/30/2009 | US7554412 Phase-locked loop circuit having correction for active filter offset |
| 06/30/2009 | US7554371 Delay locked loop |
| 06/30/2009 | US7554370 Method and system for synchronizing phase of triangular signal |
| 06/28/2009 | CA2647670A1 Synchronized wireless networked system |
| 06/25/2009 | WO2009079615A1 Frequency synthesizer and related method for generating wideband signals |
| 06/25/2009 | WO2009076838A1 Control data process method and device |
| 06/25/2009 | WO2009076748A1 Clock reproducing and timing method in a system having a plurality of devices and memory controller with flexible data alignment |
| 06/25/2009 | US20090160566 Low voltage logen |
| 06/25/2009 | US20090160565 Semiconductor integrated circuit |
| 06/25/2009 | US20090160564 Enhanced all digital phase-locked loop and oscillation signal generation method thereof |
| 06/25/2009 | US20090160560 Phase locked loop and method for controlling the same |
| 06/25/2009 | US20090160512 Delay control circuit and delay control method |
| 06/25/2009 | US20090160511 Pll circuit |
| 06/25/2009 | US20090160510 Bias voltage generation circuit and clock synchronizing circuit |
| 06/25/2009 | US20090160509 Overclocking with phase selection |
| 06/25/2009 | US20090160508 Pll circuit |
| 06/25/2009 | US20090160507 Apparatus and method for clock signal synchronization in JTAG testing in systems having selectable modules processing data signals at different rates |
| 06/25/2009 | US20090160506 Power-on clear circuit |
| 06/25/2009 | US20090160504 Methods and systems for synchronizing a control signal of a slave follower with a master source |
| 06/25/2009 | US20090160488 Apparatus and method for clock signal synchronization in JTAG testing in systems having modules processing clock signals at different rates |
| 06/24/2009 | EP2073389A1 Method and apparatus for multi-mode clock data recovery |
| 06/24/2009 | EP1770935B1 A method for implementing the access configuration mode resource reservation in the next generation network |
| 06/24/2009 | CN101465648A Semiconductor integrated circuit |
| 06/24/2009 | CN101465647A Filter of phase-locked loop apparatus and phase-locked loop apparatus |
| 06/24/2009 | CN101465646A PLL circuit |
| 06/24/2009 | CN100505828C In-phase clock generation device and method |
| 06/24/2009 | CN100505546C Reference signal source reinforcing device and satellite signal emitter |
| 06/24/2009 | CN100505545C Duty degree correction circuit and delayed phase-lock loop having same |
| 06/24/2009 | CN100505526C Low voltage circuit for interfacing with high voltage analog signals |
| 06/24/2009 | CN100504403C Phase tester with improved timing boundary |
| 06/23/2009 | US7552023 Parameter correction circuit and parameter correction method |
| 06/23/2009 | US7551906 AM/FM radio receiver and local oscillator circuit used therein |
| 06/23/2009 | US7551740 Weighted secret sharing and reconstructing method |
| 06/23/2009 | US7551039 Phase adjustment in phase-locked loops using multiple oscillator signals |
| 06/23/2009 | US7551037 PLL circuit having reduced pull-in time |
| 06/23/2009 | US7551012 Phase shifting in DLL/PLL |
| 06/23/2009 | US7551011 Constant phase angle control for frequency agile power switching systems |
| 06/23/2009 | US7551010 PLL circuit and design method thereof |
| 06/18/2009 | WO2009076562A1 Tracking filter for a receiver |
| 06/18/2009 | US20090156150 Frequency synthesizer and related method for generating wideband signals |
| 06/18/2009 | US20090154268 Dll circuit, imaging device, and memory device |
| 06/18/2009 | US20090154267 Clock signal generating circuit and data output apparatus using the same |
| 06/18/2009 | US20090153255 All digital phase lock loop and method for controlling phase lock loop |
| 06/18/2009 | US20090153254 Phase locked loop circuit performing two point modulation and gain calibration method thereof |
| 06/18/2009 | US20090153253 System and method for reducing lock time in a phase-locked loop |
| 06/18/2009 | US20090153252 Multi-band voltage controlled oscillator controlling module, phase locked loop utilizing which and related method thereof |
| 06/18/2009 | US20090153206 Optical driver including a multiphase clock generator having a delay locked loop (dll), optimized for gigahertz frequencies |
| 06/18/2009 | US20090153205 Methods, devices, and systems for a delay locked loop having a frequency divided feedback clock |
| 06/18/2009 | US20090153204 Phase locked loop circuit and semiconductor integrated circuit device using the same |
| 06/18/2009 | US20090153203 Pll circuit |
| 06/18/2009 | US20090153202 Synchronization circuit |
| 06/17/2009 | EP2071730A2 Delay lock loops for wireless communication systems |
| 06/17/2009 | EP2070230A2 Spread spectrum clock generator using arrival locked loop technology |
| 06/17/2009 | CN101461138A Frequency synthesizer |
| 06/17/2009 | CN101459427A Dual-mode counter-divider circuit for very high frequency operation |
| 06/17/2009 | CN101459426A Dll clock signal generating circuit capable of correcting a distorted duty ratio |
| 06/17/2009 | CN100501748C Method and apparatus for dynamic system level frequency scaling |
| 06/16/2009 | US7548601 Slave device with synchronous interface for use in synchronous memory system |
| 06/16/2009 | US7548365 Semiconductor device and method comprising a high voltage reset driver and an isolated memory array |
| 06/16/2009 | US7548132 Monolithic clock generator and timing/frequency reference |
| 06/16/2009 | US7548124 System and method for self calibrating voltage-controlled oscillator |
| 06/16/2009 | US7548123 Dividerless PLL architecture |
| 06/16/2009 | US7548122 PLL with switched parameters |