Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
02/2010
02/16/2010US7663416 Apparatus and related method for generating output clock
02/16/2010US7663415 Phase locked loop (PLL) method and architecture
02/11/2010WO2010017274A1 Accumulated phase-to-digital conversion in digital phase locked loops
02/11/2010WO2010016301A1 Phase comparator, pll circuit, and dll circuit
02/11/2010WO2010015996A1 State saving control loop for generating at least one output signal
02/11/2010WO2009153716A3 Fast-locking bang-bang pll with low output jitter
02/11/2010US20100033260 Oscillation circuit
02/11/2010US20100033257 Phase noise minimized phase/frequency-locked voltage-controlled oscillator circuit
02/11/2010US20100033256 Cold atom micro primary standard
02/11/2010US20100033221 Control circuit of read operation for semiconductor memory apparatus
02/11/2010US20100033220 Accumulated phase-to-digital conversion in digital phase locked loops
02/11/2010US20100033219 Semiconductor integrated circuit and method of controlling the same
02/11/2010US20100033218 Semiconductor integrated circuit and method of controlling the same
02/11/2010US20100033217 Delayed-Locked Loop with power-saving function
02/11/2010US20100033216 Synchronization circuit and method with transparent latches
02/11/2010DE102009027495A1 Heterodyn-Sende-/Empfangssysteme und Verfahren Heterodyne transmission / reception systems and methods
02/10/2010EP1553702B1 Digital circuit having a delay circuit for clock signal timing adjustment
02/10/2010EP1336310B1 Methods and apparatus for identifying asset location in mobile communication networks
02/10/2010CN101647200A Method, can bus driver, and can bus system for recovering a clock frequency of a can bus
02/10/2010CN100589326C Loop low pass filter
02/09/2010US7660378 Phase estimation method in a digital and phase locked loop communication system
02/09/2010US7660187 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
02/09/2010US7659783 System and method for phase-locked loop (PLL) for high-speed memory interface (HSMI)
02/09/2010US7659782 Apparatus and method to reduce jitter in a phase locked loop
02/09/2010US7659761 Operation mode setting apparatus, semiconductor integrated circuit including the same, and method of controlling semiconductor integrated circuit
02/09/2010US7659760 PLL circuit and semiconductor integrated device
02/09/2010US7659759 Phase synchronous circuit
02/09/2010US7659758 Reset circuit and system having reset circuit
02/09/2010US7659757 Glitch-free clock regeneration circuit
02/09/2010CA2534370C Tunable frequency, low phase noise and low thermal drift oscillator
02/04/2010WO2009152106A3 Dithering a digitally-controlled oscillator output in a phase-locked loop
02/04/2010US20100027369 Semiconductor integrated circuit device
02/04/2010US20100026406 Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic appratus
02/04/2010US20100026405 Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus
02/04/2010US20100026397 Pll circuit
02/04/2010US20100026396 Compensated high-speed pll circuit
02/04/2010US20100026395 Method and apparatus for mitigating vco pulling
02/04/2010US20100026394 System and method for modulating pressure in an alkali-vapor cell
02/04/2010US20100026367 Double-balanced sinusoidal mixing phase interpolator circuit and method
02/04/2010US20100026355 Load drive device and control system of the same
02/04/2010US20100026354 Delay Amount Estimating Apparatus and Signal Transmitting Apparatus
02/04/2010US20100026353 Semiconductor device for constantly maintaining data access time
02/04/2010US20100026352 All digital frequency-locked loop circuit method for clock generation in multicore microprocessor systems
02/04/2010US20100026351 System and Method to Improve the Efficiency of Synchronous Mirror Delays and Delay Locked Loops
02/04/2010US20100026350 Clock data recovery device
02/04/2010US20100026314 System and method for on-chip jitter injection
02/04/2010US20100026245 Single-phase phase locked loop suitable for use in a hybrid vehicle charging system and method for charging a hybrid vehicle from a single-phase power source
02/03/2010EP2150063A1 System for generation of a synchronization signal via stations connected via a packet switching network
02/03/2010CN201398176Y Wideband voltage-controlled oscillator
02/03/2010CN101641866A Power-saving clocking technique
02/03/2010CN101640537A Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus
02/03/2010CN101640536A Locking detector of phase-locked loop (PLL) and detection method thereof
02/03/2010CN101640535A PLL circuit, communication device, and loopback test method of communication device
02/03/2010CN101640534A Full digital phase-locked loop applying rapid frequency capture method
02/03/2010CN101640533A Rapid locking method for full digital phase-locked loop
02/03/2010CN101640532A Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus
02/03/2010CN100588122C Pulse generator, optical disk writer and tuner
02/03/2010CN100587840C Memory device having delay locked loop
02/03/2010CN100587629C Method for modulating atomic clock signal with coherent population trapping and corresponding atomic clock
02/02/2010US7657775 Dynamic memory clock adjustments
02/02/2010US7657689 Methods and apparatus for handling reset events in a bus bridge
02/02/2010US7656988 Start up circuit for delay locked loop
02/02/2010US7656987 Phase generator for introducing phase shift in a signal
02/02/2010US7656986 Low jitter phase rotator
02/02/2010US7656971 Adjustable phase controlled clock and data recovery circuit
02/02/2010US7656422 Pulse width modulaton device and image forming apparatus
02/02/2010US7656243 Monolithic clock generator and timing/frequency reference
02/02/2010US7656241 Optical pumping device and method
02/02/2010US7656238 Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver
02/02/2010US7656237 Method to gate off PLLS in a deep power saving state without separate clock distribution for power management logic
02/02/2010US7656236 Noise canceling technique for frequency synthesizer
02/02/2010US7656235 Communication system and oscillation signal provision method
02/02/2010US7656234 Circuit and oscillating apparatus
02/02/2010US7656208 PLL oscillation circuit
02/02/2010US7656207 Delay locked loop circuit having coarse lock time adaptive to frequency band and semiconductor memory device having the delay locked loop circuit
02/02/2010US7656206 Phase-locked loop circuit
02/02/2010US7656147 Method and apparatus for measuring pulse widths of a side-band signal
01/2010
01/28/2010WO2010011459A2 Method and apparatus for reducing peak current variation in a radio
01/28/2010WO2010011272A1 Frequency synthesizers for wireless communication systems
01/28/2010WO2009147474A3 Methods of calibrating a clock using multiple clock periods with a single counter and related devices and methods
01/28/2010US20100022885 Switching dc converting device and portable system for ultrasonic medical imaging and diagnosing and method thereof
01/28/2010US20100020912 Clock synchroniser
01/28/2010US20100020730 Frequency synthesizers for wireless communication systems
01/28/2010US20100019856 Monolithic Clock Generator and Timing/Frequency Reference
01/28/2010US20100019855 Systems and methods using programmable fixed frequency digitally controlled oscillators for multirate low jitter frequency synthesis
01/28/2010US20100019854 System And Method For Effectively Implementing A Loop Filter Device
01/28/2010US20100019826 Switched capacitor circuit capable of minimizing clock feedthrough effect and having low phase noise and method thereof
01/28/2010US20100019814 Semiconductor ic device and data output method of the same
01/28/2010US20100019813 Internal clock driver circuit
01/28/2010US20100019812 Pll circuit, radio terminal device and control method of pll circuit
01/28/2010US20100019811 Self-Stabilizing Byzantine-Fault-Tolerant Clock Synchronization System and Method
01/28/2010US20100019810 Circuit for generating negative voltage and semiconductor memory apparatus using the same
01/28/2010US20100019800 Vernier phase error detection method
01/28/2010US20100019799 Methods And Apparatus For Digital Phase Detection With Improved Frequency Locking
01/28/2010US20100019795 Variable delay circuit, timing generator and semiconductor testing apparatus
01/27/2010CN201393217Y Circuit for preventing lock losing of high and low work frequency ends of phase lock loop
01/27/2010CN101636911A Vco amplitude control
01/27/2010CN101636910A Method of forming a charge pump controller and structure therefor
01/27/2010CN101635570A Numerical control oscillator capable of shutting down
01/27/2010CN100586023C A switched capacitor circuit compensation apparatus and method