Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
09/1999
09/07/1999US5949597 Method and apparatus for data pulse qualification wherein the amplitude of a preceding pulse of opposite polarity is tracked
09/07/1999US5949292 Ring oscillator using current robbing for controlling delay period
09/07/1999US5949269 Method and apparatus to reduce signal delay mismatch in a high speed interface
09/07/1999US5949268 Variable delay circuit for varying delay time and pulse width
09/07/1999US5949260 Clock signal processing circuit and semiconductor device in which a clock signal is processed in improved method
09/07/1999US5949259 Zero-delay slew-rate controlled output buffer
09/07/1999US5949257 Touch sensor device
09/07/1999US5949255 Method and apparatus for generating active pulse of desired polarity
09/07/1999US5948111 Real time comparison of integrated circuit operation
09/07/1999US5948083 For latching an input data signal
09/01/1999EP0939489A2 Chopper voltage comparator circuit and method
09/01/1999EP0939486A2 Filter circuit
09/01/1999CN1227357A Method of controlling clock signal and circuit for controlling clock signal
08/1999
08/31/1999US5946268 Internal clock signal generation circuit including delay line, and synchronous type semiconductor memory device including internal clock signal
08/31/1999US5946244 Delay-locked loop with binary-coupled capacitor
08/31/1999US5945881 PLL frequency synthesizer with K multiplication in addition to division for subtraction of phase noise
08/31/1999US5945864 Circuit configuration for offset compensation
08/31/1999US5945863 Analog delay circuit
08/31/1999US5945862 Circuitry for the delay adjustment of a clock signal
08/31/1999US5945861 Clock signal modeling circuit with negative delay
08/31/1999US5945860 CLM/ECL clock phase shifter with CMOS digital control
08/31/1999US5945857 Method and apparatus for duty-cycle correction
08/31/1999US5945851 Current source apparatus with bias switches
08/31/1999US5945850 Edge signal restoration circuit and method
08/26/1999DE19822374A1 Duty cycle control buffer circuit with selective frequency division
08/26/1999DE19822373A1 Frequency multiplying circuit and 50 per cent duty cycle equalization
08/24/1999US5943271 Semiconductor integrated circuit device
08/24/1999US5942937 Signal detection circuit using a plurality of delay stages with edge detection logic
08/24/1999US5942930 Shaping and level adjusting filter
08/24/1999US5942927 Clock signal generator for a logic analyzer controlled to lock both edges to a reference clock signal
08/24/1999US5942924 Digital circuit for conserving static current in an electronic device
08/24/1999US5942921 Differential comparator with an extended input range
08/24/1999US5942915 Level shift circuit formed by two cascaded CMOS inverters
08/18/1999EP0936783A2 Asynchronous clock for adaptive equalization
08/18/1999EP0936737A2 Circuit and method for compensating for degradation in pulse width of burst data
08/18/1999EP0935849A1 Low-impedance cmos output stage and method
08/17/1999US5940608 In an integrated circuit
08/17/1999US5940448 Universal serial bus receiver having input signal skew compensation
08/17/1999US5940334 Memory interface circuit including bypass data forwarding with essentially no delay
08/17/1999US5939919 Clock signal distribution method for reducing active power dissipation
08/17/1999US5939916 Phase shifter suitable for clock recovery systems
08/17/1999US5939913 DLL circuit and semiconductor memory device using same
08/12/1999DE19823701A1 Equalization pulse width control circuit for data transmission system
08/11/1999EP0934632A2 A method and an arrangement for adapting, from a dc point of view, a first circuit to at least one second circuit
08/11/1999EP0934627A1 Circuit arrangement for evaluating a binary signal defined by current threshold values
08/10/1999US5936912 Electronic device and semiconductor memory device using the same
08/10/1999US5936893 Integrated circuit clock input buffer
08/10/1999US5936892 Memory cell DC characterization apparatus and method
08/10/1999US5936451 Delay circuit and method
08/10/1999US5936441 Formed in a semiconductor integrated circuit on a semiconductor substrate
08/10/1999US5936435 For comparing a first dc voltage with a second dc voltage
08/10/1999US5936434 Voltage comparator and A/D converter
08/10/1999US5936433 Comparator including a transconducting inverter biased to operate in subthreshold
08/10/1999US5936431 Input signal variation detection circuit
08/10/1999US5936429 Interface circuit and method for transmitting binary logic signals with reduced power dissipation
08/10/1999US5935257 Skew-reduction circuit and semiconductor device
08/05/1999WO1999039438A1 Self-calibrating programmable phase shifter
08/05/1999DE19756135C1 Extrapolating discriminator for determining starting point of analog signal, such as for high energy physics
08/03/1999US5933799 Noise eliminating bus receiver
08/03/1999US5933040 Method and apparatus for a data detection circuit operating from a low voltage power source
08/03/1999US5933039 Integrated circuit
08/03/1999US5933035 Digital clock frequency multiplication circuit and method
08/03/1999US5933032 Apparatus and method for generating a pulse signal
07/1999
07/27/1999US5930689 Apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween
07/27/1999US5930294 Frequency measurement circuit
07/27/1999US5930275 Clock error detection circuit
07/27/1999US5929684 Feedback pulse generators
07/27/1999US5929682 Clock signal generator, clock signal generating system, and clock pulse generation method
07/27/1999US5929681 Delay circuit applied to semiconductor memory device having auto power-down function
07/27/1999US5929679 Buffering circuit
07/27/1999US5929668 Data output buffer circuit
07/27/1999US5929662 For providing an output signal
07/27/1999US5929661 High speed voltage comparator with matching current sources using current difference amplifiers
07/27/1999US5929503 Electronic circuit
07/27/1999US5929502 Level shifter stage with punch through diode
07/22/1999WO1999037024A1 A variable delay cell with a self-biasing load
07/21/1999EP0930714A1 Digital phase locked loop capable of suppressing jitter
07/21/1999EP0930710A2 Clock signal detection circuit
07/21/1999EP0930709A1 Circuit for producing pulse signals with a desired duty cycle
07/21/1999EP0929939A1 Self-timed pulse control circuit
07/21/1999EP0929901A1 Memory array, memory cell, and sense amplifier test and characterization
07/21/1999EP0929900A1 Data retention test for static memory cell
07/21/1999EP0929898A1 Memory block select using multiple word lines to address a single memory cell row
07/21/1999EP0929896A1 Memory including resistor bit-line loads
07/21/1999EP0929895A1 Active power supply filter
07/20/1999US5926514 Apparatus for clock shifting in an integrated transceiver
07/20/1999US5926057 Semiconductor device, circuit having the device, and correlation calculation apparatus, signal converter, and signal processing system utilizing the circuit
07/20/1999US5926044 Clock switching device and method
07/20/1999US5926042 Precision clock frequency detector having reduced supply voltage dependence
07/20/1999CA2148283C Cordless telecommunication apparatus
07/14/1999CN2329120Y Contactless level switch device
07/14/1999CN2329077Y Active pulse transformer
07/14/1999CN1222791A Method and apparatus for phase rotation in phase locked loop
07/13/1999US5923706 Process for measuring phase jitter of a data signal
07/13/1999US5923601 In an integrated circuit
07/13/1999US5923455 Data identifying device and light receiver using the same
07/13/1999US5923219 Automatic threshold control circuit and signal amplifying circuit for amplifying signals by compensating for low-frequency response of photodetector
07/13/1999US5923206 Charge injection cancellation technique
07/13/1999US5923203 CMOS soft clipper
07/13/1999US5923202 Input/output overvoltage containment circuit for improved latchup protection