Patents for H03D 3 - Demodulation of angle-modulated oscillations (6,449)
03/2006
03/09/2006US20060050830 Method and device for generating a clock signal
03/09/2006US20060050829 Pll using unbalanced quadricorrelator
03/09/2006US20060050828 Phase comparison circuit and cdr circuit
03/09/2006US20060050827 Synchronization device and semiconductor device
03/08/2006EP1632039A1 Digital baseband receiver with dc discharge and gain control circuits
03/08/2006EP1285493B1 Circuit arrangement for correcting tolerances
03/07/2006US7010077 Gated clock recovery circuit
03/07/2006US7010076 Systems and methods for holdover circuits in phase locked loops
03/07/2006US7010074 Oversampling clock recovery having a high follow-up character using a few clock signals
03/07/2006US7010063 Receiver circuit and method of processing a received signal
03/07/2006US7010014 Digital spread spectrum circuitry
03/02/2006US20060046675 Converter circuit for a limiter receiver structure and method for converting a signal in a limiter receiver structure
03/02/2006US20060045227 Delay lock loop phase glitch error filter
03/02/2006DE10336300B4 Verzögerungsregelschaltung mit Tastverhältniskorrektur und zugehöriges Korrekturverfahren Delay control circuit with Tastverhältniskorrektur and associated correction method
02/2006
02/28/2006US7006590 Timing circuit with dual phase locked loops
02/28/2006US7006585 Recovering data encoded in serial communication channels
02/23/2006US20060039516 Phase-locked loop circuit
02/23/2006US20060039505 Frequency-mixing method and frequency-mixing device using the same
02/22/2006EP1163719B1 Radio fm receiver
02/21/2006US7003263 Telecommunications receiver and a transmitter
02/21/2006US7003066 Digital phase locked loop with phase selector having minimized number of phase interpolators
02/21/2006US7003065 PLL cycle slip detection
02/21/2006US7002384 Loop circuitry with low-pass noise filter
02/16/2006WO2006017460A2 Data transmission synchronization
02/16/2006US20060034411 Method and apparatus of recording data on write-once recording medium
02/16/2006US20060034410 Pll with balanced quadricorrelator
02/16/2006US20060034409 Digital vco and pll circuit using the digital vco
02/15/2006EP1626495A1 Fm signal demodulation method and device thereof
02/14/2006US6999745 Mixer with a variable gain current-to-voltage converter
02/14/2006US6999548 Communication channel detector and channel detection method
02/14/2006US6999547 Delay-lock-loop with improved accuracy and range
02/14/2006US6999537 Method of removing DC offset for a ZIF-based GSM radio solution with digital frequency correlation
02/14/2006US6999528 I/Q demodulator device with three power detectors and two A/D converters
02/14/2006US6998908 Adaptive interference cancellation receiving system using synthesizer phase accumulation
02/09/2006US20060029177 Unified digital architecture
02/09/2006US20060029176 Data transmission synchronization
02/09/2006US20060029175 Digital frequency locked delay line
02/08/2006EP1624636A1 Method and apparatus for receiving an OFDM signal and compensating IQ imbalance and frequency offset
02/08/2006CN1732623A Analogue/digital delay locked loop
02/07/2006US6996193 Timing error detection circuit, demodulation circuit and methods thereof
02/07/2006US6996168 Signal-processing circuit, and recording and playback apparatus employing the same
02/07/2006US6995595 Direct conversion receiver having a DC offset eliminating function
02/02/2006WO2006012245A1 Receiver for use in wireless communications and method and terminal using it
02/02/2006US20060023827 Clock signal extraction device and method for extraction a clock signal from data signal
02/02/2006US20060023826 Carrier phase detector
02/02/2006US20060023814 Efficient implementation of GSM/GPRS equalizer
02/02/2006US20060023813 Apparatus and method for integration of tuner functions in a digital receiver
02/01/2006EP1620952A2 Receiver architectures utilizing coarse analog tuning and associated methods
02/01/2006CN1729615A Mixer system with amplitude, common mode and phase corrections
01/2006
01/31/2006US6993306 Determination and processing for fractional-N programming values
01/31/2006US6993109 Zero-delay buffer circuit for a spread spectrum clock system and method therefor
01/31/2006US6993108 Digital phase locked loop with programmable digital filter
01/31/2006US6993107 Analog unidirectional serial link architecture
01/31/2006US6993106 Fast acquisition phase locked loop using a current DAC
01/31/2006US6993097 Demodulation method and demodulator for CPFSK-modulated signals
01/31/2006US6993096 BS digital broadcasting receiver
01/31/2006US6993095 Phase-locked loop initialization via curve-fitting
01/31/2006US6992990 Radio communication apparatus
01/31/2006US6992950 Delay locked loop implementation in a synchronous dynamic random access memory
01/26/2006WO2006009707A2 Burst mode receiver based on charge pump pll with idle-time loop stabilizer
01/26/2006US20060019624 Simplified high frequency tuner and tuning method
01/26/2006US20060019622 System and apparatus for a direct conversion receiver and transmitter
01/26/2006US20060018418 Jitter measuring apparatus, jitter measuring method and PLL circuit
01/26/2006US20060018417 Phase detection circuit and method thereof and clock recovery circuit and method thereof
01/26/2006US20060018408 Method and circuit for generating an auxiliary symbol for adjusting a maq demodulator
01/26/2006US20060017498 Digital phase locked loop
01/25/2006EP1618407A1 Digital electronic support measures
01/25/2006CN1726649A Transmission circuit and transmitter/receiver using same
01/24/2006US6990165 Phase and frequency lock detector
01/24/2006US6990164 Dual steered frequency synthesizer
01/24/2006US6990163 Apparatus and method for acquiring phase lock timing recovery in a partial response maximum likelihood (PRML) channel
01/24/2006US6989710 Binary frequency-shift keying demodulator and frequency-to-voltage converter
01/24/2006US6989693 Pulse interval to voltage converter and conversion method thereof
01/19/2006US20060013349 Recovery circuits and methods for the same
01/19/2006US20060013339 Diferrential decoder followed by non-linear compensator
01/18/2006CN1723610A Regenerative divider for up and down conversion of radio frequency (RF) signals
01/17/2006US6987815 Receive method and receiver in communication system
01/12/2006WO2006003031A1 Method and device for mixing digital radio signals
01/12/2006WO2005101671A3 Method and apparatus for dc offset removal
01/12/2006US20060008042 Analog unidirectional serial link architecture
01/11/2006EP1615336A1 Radio receiver front-end and a method for suppressing out-of-band interference
01/11/2006EP0963626B1 Apparatus in a communication system
01/11/2006CN1720604A Constant delay zero standby differential logic receiver and method
01/10/2006USRE38932 Digital demodulator
01/10/2006US6985552 System and method for generating a reference clock
01/10/2006US6985551 Linear dead-band-free digital phase detection
01/10/2006US6985029 Circuit configuration for tolerance correction in a frequency demodulator
01/05/2006US20060002502 Lock system and method for interpolator based receivers
01/05/2006US20060002483 LVDS receiver for controlling current based on frequency and method of operating the LDVS receiver
01/04/2006CN1716789A System and method for realizing high side and low side injection frequency signal filter
01/03/2006US6983032 Digital timing recovery method for communication receivers
01/03/2006US6983029 Blind channel estimation and data detection for PSK OFDM-based receivers
01/03/2006US6982606 Method and device for dynamically calibrating frequency
01/03/2006US6982592 Zero if complex quadrature frequency discriminator and FM demodulator
12/2005
12/29/2005WO2004093327A3 Receiver architectures utilizing coarse analog tuning and associated methods
12/29/2005US20050286643 Transmitter circuit, receiver circuit, clock data recovery phase locked loop circuit, data transfer method and data transfer system
12/29/2005US20050285669 Demodulation circuit and receiver device
12/27/2005US6980787 Image rejection mixing in wideband applications
12/22/2005US20050281367 Clock synchroniser
12/22/2005US20050281366 Burst mode receiver based on charge pump PLL with idle-time loop stabilizer
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