Patents for H03D 3 - Demodulation of angle-modulated oscillations (6,449)
02/2007
02/13/2007US7177382 Fully integrated broadband tuner
02/13/2007US7177381 Noise-resistive, burst-mode receiving apparatus and a method for recovering a clock signal and data therefrom
02/13/2007US7177372 Method and apparatus to remove effects of I-Q imbalances of quadrature modulators and demodulators in a multi-carrier system
02/13/2007US7177362 Apparatus for adaptive resolution of phase ambiguity value
02/08/2007US20070030939 Digital phase locked loop for sub-mu technologies
02/08/2007US20070030938 Method and apparatus for predictive switching
02/08/2007US20070030937 Bit synchronization circuit with phase tracking function
02/07/2007EP1219087B1 Method and apparatus for multiple channel signal processing
02/06/2007US7173995 Systems and methods for correcting gain error due to transition density variation in clock recovery systems
02/06/2007US7173993 Method for sampling phase control
02/06/2007US7173981 Dual layer signal processing in a layered modulation digital signal system
02/01/2007US20070025491 Automatic frequency control loop circuit
02/01/2007US20070025490 Digital phase-locked loop
02/01/2007US20070025489 Method and circuit for dynamically changing the frequency of clock signals
01/2007
01/30/2007US7170965 Low noise divider module for use in a phase locked loop and other applications
01/30/2007US7170964 Transition insensitive timing recovery method and apparatus
01/30/2007US7170963 Clock recovery method by phase selection
01/30/2007US7170961 Method and apparatus for frequency-domain tracking of residual frequency and channel estimation offsets
01/30/2007US7170411 Method of and system for rapidly locating all passive underground electronic marker types
01/25/2007WO2007011345A2 Method, apparatus and system for modulating and demodulating signals compatible with multiple receiver types and designed for improved receiver performance
01/25/2007US20070019773 Data clock recovery system and method employing phase shifting related to lag or lead time
01/25/2007US20070019760 System and method for operating a phase-locked loop
01/25/2007US20070019759 Amplitude information extraction apparatus and amplitude information extraction method
01/25/2007US20070019539 Multiple input, multiple output channel, digital receiver tuner
01/25/2007US20070019113 Mixer system with amplitude-, common mode- and phase corrections
01/24/2007CN1902830A DC offset correction for direct-conversion receiver
01/24/2007CN1902815A 低if无线电接收机 Low if a radio receiver
01/23/2007US7167694 Integrated multi-tuner satellite receiver architecture and associated method
01/23/2007US7167535 Circuit sharing for frequency and phase error correction
01/18/2007WO2006039187A3 Sigma-delta based phase lock loop
01/18/2007US20070015482 Simplified high frequency tuner and tuning method
01/18/2007US20070013433 Temperature compensation for internal inductor resistance
01/18/2007DE19837409B4 Verfahren zur Phasenregelung in einem optischen PSK-Homodyn-Empfänger Method for phase control in an optical PSK homodyne receiver
01/17/2007CN1898932A Method and apparatus for compensating i/q imbalance in receivers
01/16/2007US7164901 DC offset-free RF front-end circuits and systems for direct conversion receivers
01/16/2007US7164895 Antenna tuned circuit for a superheterodyne receiver
01/16/2007US7164743 Delay locked loop
01/16/2007US7164730 Digital demodulator, a telecommunications receiver, and a method of digital demodulation
01/16/2007US7164327 Compensation of the IQ phase asymmetry in quadrature modulation and demodulation methods
01/11/2007WO2007005392A1 Analog to digital converter with ping-pong architecture
01/11/2007US20070010223 Digital baseband receiver with DC discharge and gain control circuits
01/10/2007EP1742375A1 Correction of adjustment errors between two I and Q paths
01/10/2007EP1563605B1 Pll with balanced quadricorrelator
01/10/2007EP1423910B1 Receiver
01/10/2007EP1155503B1 Radio receiver and method for preloading an average dc-offset into a channel filter
01/09/2007US7162002 Phase-interpolator based PLL frequency synthesizer
01/09/2007US7162001 Charge pump with transient current correction
01/09/2007US7162000 Delay locked loop synthesizer with multiple outputs and digital modulation
01/09/2007US7161998 Digital phase locked loop for regenerating the clock of an embedded signal
01/09/2007CA2442876C Timesliced discrete-time phase locked loop
01/04/2007WO2007000632A2 Automatic receiver calibration with noise and fast fourier transform
01/04/2007WO2006122190A3 Hopping frequency synthesizer using a digital phase-locked loop
01/04/2007US20070002994 Clock jitter estimation apparatus, systems, and methods
01/04/2007US20070002993 Clock data recovery loop with separate proportional path
01/04/2007US20070002992 Method and apparatus for automatic clock alignment
01/03/2007EP1739825A1 Verfahren zur Demodulation unter Verwendung von automatischer Korrigierung einer spectralen Inversion sowie Vorrichtung
01/03/2007EP1738471A2 Method and apparatus for dc offset removal
01/03/2007EP1738458A1 Dual conversion receiver with programmable intermediate frequency and channel selection
01/03/2007CN1890889A Bandpass sampling receiver and the sampling method
01/02/2007US7158603 Method and apparatus for compensating deviation variances in a 2-level FSK FM transmitter
01/02/2007US7158602 Phase locked loop circuit and clock reproduction circuit
01/02/2007US7158601 Clock data recovery method and circuit for network communication
01/02/2007US7158600 Charge pump phase locked loop
01/02/2007US7158596 Communication system and method for sending and receiving data at a higher or lower sample rate than a network frame rate using a phase locked loop
01/02/2007US7158588 System and method for obtaining accurate symbol rate and carrier phase, frequency, and timing acquisition for minimum shift keyed waveform
01/02/2007US7158587 Multi-channel serdes receiver for chip-to-chip and backplane interconnects and method of operation thereof
01/02/2007US7157942 Digital frequency difference detector with inherent low pass filtering and lock detection
12/2006
12/28/2006WO2006137154A1 Method for selecting low if of fm radio tuner, and fm radio tuner using that if
12/28/2006WO2005060140A3 Module to module signaling with jitter modulation
12/28/2006US20060291604 PLL noise smoothing using dual-modulus interleaving
12/28/2006US20060291603 Apparatus for generating tracking signal
12/27/2006EP1737174A1 Transmitter circuit, receiver circuit, clock extracting circuit, data transmitting method, and data transmitting system
12/27/2006EP1709729A4 Transmitter predistortion circuit and method therefor
12/27/2006EP1116323B1 Lock-in aid frequency detector
12/26/2006US7154979 Timing recovery with variable bandwidth phase locked loop and non-linear control paths
12/26/2006US7154978 Cascaded delay locked loop circuit
12/26/2006US7154977 Techniques to reduce transmitted jitter
12/26/2006US7154974 Data recovery system and applications thereof in radio receivers
12/26/2006US7154971 DTSE at less than two complex samples per symbol
12/21/2006WO2006135274A1 Method of demodulation of a signal of multiple position frequency manipulation with equidistant frequency spreading, demodulator for this signal and computer-readable medium
12/21/2006US20060285619 Digital control oscillator
12/21/2006US20060285618 Adaptive phase recovery
12/20/2006CN1291412C Oscillating clock generating circuit and method thereof
12/19/2006US7151814 Hogge phase detector with adjustable phase output
12/19/2006US7151811 Electric circuit for decoding a two-phase asynchronous data signal and corresponding decoding method, device for controlling equipment
12/19/2006US7151808 MIMO receiver and method of reception therefor
12/19/2006US7151807 Fast acquisition of timing and carrier frequency from received signal
12/14/2006US20060281432 Radio frequency tuner
12/14/2006US20060281427 Frequency change arrangement and radio frequency tuner
12/14/2006US20060281411 Method of reducing imbalance in a quadrature frequency converter, method of measuring imbalance in such a converter, and apparatus for performing such method
12/14/2006US20060280277 PLL circuit and semiconductor device provided with PLL circuit
12/14/2006US20060280276 Digital lock detector for phase-locked loop
12/14/2006US20060280275 Rational number frequency multiplier circuit and method for generated rational number frequency
12/14/2006US20060280240 Information read device and read signal processing circuit
12/13/2006CN1290254C Process and device for detecting and processing signal waves
12/12/2006US7149270 Clock recovery circuit
12/12/2006US7149269 Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery
12/12/2006US7149266 Signal receiver and method of compensating frequency offset
12/12/2006US7149261 Image reject circuit using sigma-delta conversion
12/12/2006US7148743 Demodulation device for reacquiring a modulated signal if reception is interrupted
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