Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
03/2002
03/14/2002WO2002021574A2 Subframe method for displaying grey scales on an active matrix el device with subdivided msb subframe
03/14/2002WO2002021573A2 Ccd image sensor and method of manufacturing same
03/14/2002WO2002021542A1 Microelectronic programmable device and methods of forming and programming the same
03/14/2002WO2002021241A2 Circuit arrangement and a method for detecting an undesired attack on an integrated circuit
03/14/2002WO2002021157A1 Flat panel x-ray imager with gain layer
03/14/2002WO2002021086A1 Thermal displacement element and radiation detector using the element
03/14/2002WO2001069658A3 One-time programmable anti-fuse element and method
03/14/2002WO2001065594A3 A method of producing a schottky varicap diode
03/14/2002WO2001046987A3 Inkjet-fabricated integrated circuits
03/14/2002US20020032545 Solid-state image pickup device and camera system
03/14/2002US20020031919 Method for improving the sidewall stoichiometry of thin film capacitors
03/14/2002US20020031916 Semiconductor device and manufacturing method thereof
03/14/2002US20020031907 Depositing titanium layer over a dielectric layer; depositing an aluminum layer on titanium layer; patterning and etching titanium and aluminum layers to form an interconnect signal line
03/14/2002US20020031898 Method of fabricating an isolation structure on a semiconductor substrate
03/14/2002US20020031895 Method to reduce floating grain defects in dual-sided container capacitor fabrication
03/14/2002US20020031894 Tap connections for circuits with leakage suppression capability
03/14/2002US20020031890 Semiconductor device of STI structure and method of fabricating MOS transistors having consistent threshold voltages
03/14/2002US20020031888 Method for reducing processing steps when fabricating a flash memory array using a blank implant
03/14/2002US20020031887 ZPROM manufacture and design and methods for forming thin structures using spacers as an etching mask
03/14/2002US20020031886 Flash memory cell
03/14/2002US20020031885 Semiconductor memory device using ferroelectric film
03/14/2002US20020031883 Method of manufacturing semiconductor device
03/14/2002US20020031882 Method for manufacturing a semiconductor integrated circuit of triple well structure
03/14/2002US20020031881 Semiconductor device and method of manufacturing the same
03/14/2002US20020031877 Method of manufacturing semiconductor device including process for implanting impurities into substrate via MOS transistor gate electrode and gate insulation film
03/14/2002US20020031874 Thin film forming device, method of forming a thin film, and self-light-emitting device
03/14/2002US20020031871 Method for increasing a very-large-scale-integrated (vlsi) capacitor size on bulk silicon and silicon-on-insulator (soi) wafers
03/14/2002US20020031850 Integrated circuit and method of designing integrated circuit
03/14/2002US20020031846 Method and device for manufacturing ceramics, semiconductor device and piezoelectric device
03/14/2002US20020031649 Quantum dot of single electron memory device and method for fabricationg thereof
03/14/2002US20020031315 Color display device fabricated with light emitting polymer (LEP) fiber controlled by image display signals
03/14/2002US20020031036 Semiconductor memory device and memory system
03/14/2002US20020031029 Semiconductor device array having dense memory cell array and hierarchical bit line scheme
03/14/2002US20020031028 Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits
03/14/2002US20020031018 Semiconductor memory and method for fabricating the same
03/14/2002US20020031009 Semiconductor memory device having source areas of memory cells supplied with a common voltage
03/14/2002US20020031008 Magnetic device and method for manufacturing the same, and solid magnetic memory
03/14/2002US20020031007 Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system
03/14/2002US20020031006 Semiconductor memory device having improved memory cell and bit line pitch
03/14/2002US20020031005 Memory cell array having ferroelectric capacitors, method of fabricating the same, and ferroelectric memory device
03/14/2002US20020030954 Layout for efficient ESD design of substrate triggered ESD protection circuits
03/14/2002US20020030949 Magnetic device, magnetic head and magnetic adjustment method
03/14/2002US20020030945 Magnetoresistive element and magnetic memory element and magnetic head using the same
03/14/2002US20020030770 Display element and method of manufacturing the same
03/14/2002US20020030768 Integrated high resolution image sensor and display on an active matrix array with micro-lens
03/14/2002US20020030767 Methods of fabricating active matrix pixel electrodes
03/14/2002US20020030533 Circuit including forward body bias from supply voltage and ground nodes
03/14/2002US20020030530 Semiconductor switching circuit and semiconductor device using same
03/14/2002US20020030513 Logic circuit cell constituting an integrated circuit and cell library having a collection of logic circuit cells
03/14/2002US20020030510 Semiconductor integrated circuit for low power and high speed operation
03/14/2002US20020030509 Semiconductor integrated circuit device
03/14/2002US20020030489 Magnetic multilayer structure with improved magnetic field range
03/14/2002US20020030443 Light emitting device, method of manufacturing the same, and thin film forming apparatus
03/14/2002US20020030440 Semiconductor device and manufacturing method therefor
03/14/2002US20020030281 Structure of wires for a semiconductor device
03/14/2002US20020030267 Compound semiconductor device
03/14/2002US20020030250 Thick film millimeter wave transceiver module
03/14/2002US20020030246 Structure and method for fabricating semiconductor structures and devices not lattice matched to the substrate
03/14/2002US20020030244 Lateral bipolar transistor and method of making same
03/14/2002US20020030243 Semiconductor device and method for fabricating the same
03/14/2002US20020030242 Integrated inductive circuits
03/14/2002US20020030241 Integrated radio frequency circuits
03/14/2002US20020030238 Semiconductor device
03/14/2002US20020030236 A semiconductor device with an improved gate electrode pattern and a method of manufacturing the same
03/14/2002US20020030232 Electrostatic discharge protection apparatus with silicon control rectifier and the method of fabricating the same
03/14/2002US20020030231 Semiconductor device having electrostatic protection circuit and method of fabricating the same
03/14/2002US20020030230 Semiconductor device having electrostatic discharge protection circuit
03/14/2002US20020030229 Implementing contacts for bodies of semiconductor-on-insulator transistors
03/14/2002US20020030228 Thin film transistor and fabrication method thereof
03/14/2002US20020030223 Semiconductor device and method of manufacturing the same
03/14/2002US20020030219 Side wall contact structure and method of forming the same
03/14/2002US20020030218 Method of making a thin film capacitor with an improved top electrode
03/14/2002US20020030217 Semiconductor memory device having plug contacted to a capacitor electrode and method for fabricating a capacitor of the semiconductor memory device
03/14/2002US20020030215 Semiconductor device
03/14/2002US20020030214 Semiconductor device and method for manufacturing the same
03/14/2002US20020030213 Semiconductor integrated circuit device and process for manufacturing the same
03/14/2002US20020030212 Semiconductor integrated circuit device
03/14/2002US20020030211 Semiconductor memory circuitry including die sites sized for 256M to 275M memory cells in a 12" wafer
03/14/2002US20020030210 Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device
03/14/2002US20020030209 Semiconductor device and method of manufacturing the same
03/14/2002US20020030208 Dram trench cell
03/14/2002US20020030207 Semiconductor device having a channel-cut diffusion region in a device isolation structure
03/14/2002US20020030206 Photodetector with built-in circuit and method for producing the same
03/14/2002US20020030205 Artificial neuron on the base of beta-driven threshold element
03/14/2002US20020030204 Voltage level shifter circuit and nonvolatile semiconductor storage device using the circuit
03/14/2002US20020030203 Buried channel strained silicon FET using a supply layer created through ion implantation
03/14/2002US20020030199 Reverse conducting thyristor
03/14/2002US20020030191 High voltage, high temperature capacitor structures and methods of fabricating same
03/14/2002US20020030190 Electro-optical device and semiconductor circuit
03/14/2002US20020030151 Method and apparatus for instantaneous exposure control in digital imaging devices
03/14/2002US20020029798 Electronic apparatus with a solar battery
03/14/2002US20020029462 Magnetoresistive trimming of GMR circuits
03/14/2002DE19938403C2 Schaltung Circuit
03/14/2002DE10136285A1 Integrierte Halbleiterschaltungsvorrichtung und Verfahren zum Anbringen von Schaltungsblöcken in der integrierten Halbleiterschaltungsvorrichtung A semiconductor integrated circuit apparatus and method for attaching of circuit blocks in the semiconductor integrated circuit device
03/14/2002DE10044537A1 Detecting short-circuits between memory cells on wafer by measuring conductivity between contacted conductive tracks
03/14/2002DE10043218A1 Schaltungsanordnung und Verfahren zur Alterungsbeschleunigung bei einem MRAM Circuit arrangement and method for accelerating aging in an MRAM
03/14/2002DE10043137A1 Vorrichtung und Verfahren zur Kennzeichnung der Version bei integrierten Schaltkreisen und Verwendung zur Steuerung von Betriebsabläufen Apparatus and method for identifying the version of integrated circuits and use for the control of operations
03/14/2002DE10041749A1 Vertikale nichtflüchtige Halbleiter-Speicherzelle sowie Verfahren zu deren Herstellung Vertical non-volatile semiconductor memory cell as well as processes for their preparation
03/14/2002DE10041748A1 SOI-Substrat sowie darin ausgebildete Halbleiterschaltung und dazugehörige Herstellungsverfahren SOI substrate and formed therein semiconductor circuit and associated manufacturing processes
03/14/2002DE10041139A1 Anordnung zur Verbesserung des ESD-Schutzes bei einem CMOS Buffer Arrangement for improving the ESD protection in a CMOS buffer