Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
03/2003
03/20/2003US20030054295 Light accumulation negative photoresist
03/20/2003US20030054186 Method of manufacturing organic el element, organic el element, and organic el display device
03/20/2003US20030053360 Semiconductor memory device
03/20/2003US20030053357 Nonvolatile semiconductor memory device having ferroelectric capacitors
03/20/2003US20030053351 Ferroelectric memory device and method for manufacturing the same
03/20/2003US20030053350 Memory device
03/20/2003US20030053347 Method of forming a semiconductor array of floating gate memory cells and strap regions, and a memory array and strap regions made thereby
03/20/2003US20030053346 FeRAM memory and method for manufacturing it
03/20/2003US20030053345 Nonvolatile semiconductor storage device and production method therefor
03/20/2003US20030053336 Read-only nonvolatile memory
03/20/2003US20030053335 Structures and methods for selectively applying a well bias to portions of a programmable device
03/20/2003US20030053334 Selective operation of a multi-state non-volatile memory system in a a binary mode
03/20/2003US20030053332 Three-dimensional memory array incorporating serial chain diode stack
03/20/2003US20030053331 Magnetoresistive level generator and method
03/20/2003US20030053328 Column repair circuit in ferroelectric memory
03/20/2003US20030053327 Nonvolatile ferroelectric memory and method for driving the same
03/20/2003US20030053277 Integrated circuit device with bump bridges and method for making the same
03/20/2003US20030053273 Electronic device having a CMOS circuit
03/20/2003US20030052989 Non-polarizing shutter/CCD module
03/20/2003US20030052983 Image capture and storage device
03/20/2003US20030052982 Method for reducing coherent row-wise and column-wise fixed pattern noise in CMOS image sensors
03/20/2003US20030052976 Imaging device an imaging method
03/20/2003US20030052945 High density element structure formed by assembly of layers and method for making same
03/20/2003US20030052869 Display, method of manufacturing the same, and method of driving the same
03/20/2003US20030052735 Ferroelectric memory device and a method for driving the same
03/20/2003US20030052730 Semiconductor integrated circuit
03/20/2003US20030052724 Clock signal distribution circuit
03/20/2003US20030052721 Bipolar junction transistor compatible with vertical replacement gate transistors
03/20/2003US20030052661 Reference voltage generator
03/20/2003US20030052660 Internal step-down power supply circuit
03/20/2003US20030052618 Electroluminescence display unit
03/20/2003US20030052616 Organic light emitting diode light source
03/20/2003US20030052600 Producing multi-color stable light emitting organic displays
03/20/2003US20030052597 Self-emitting display apparatus
03/20/2003US20030052596 Organic electroluminescence display and fabricating method thereof
03/20/2003US20030052440 Improving alignment accuracy in processing fuses that are used for circuits, laser-machining the fuse wire, alignment using the target mark formed in the metal layer
03/20/2003US20030052389 Semiconductor device including a capacitance
03/20/2003US20030052387 Bipolar transistor
03/20/2003US20030052386 An interlayer dielectric film covering the resistor layer has first and second embedded plugs providing the interconnection to reduce in temperature rise in resistor elements
03/20/2003US20030052385 Semiconductor devices
03/20/2003US20030052381 Solid state image sensing device
03/20/2003US20030052378 Semiconductor device and method of manufacturing the same
03/20/2003US20030052376 Semiconductor device with high-k dielectric layer and method for manufacturing the same
03/20/2003US20030052374 Semiconductor device and method for fabricating the same
03/20/2003US20030052372 Capable of easily setting the sheet resistance of a resistive element or the like to an arbitrary value
03/20/2003US20030052371 Specific metal oxide semiconductor transistors with a gate insulation film thin enough to permit flow of tunnel current therein and which is adaptable for use with low power circuitry operable with low voltage of 2 volts or less
03/20/2003US20030052368 Input protection circuit
03/20/2003US20030052367 Apparatus and method for improved power bus esd protection
03/20/2003US20030052365 Structure and fabrication method for capacitors integratible with vertical replacement gate transistors
03/20/2003US20030052364 Vertical dual gate field effect transistor
03/20/2003US20030052363 Non-volatile semiconductor memory with single layer gate structure
03/20/2003US20030052362 Semiconductor device
03/20/2003US20030052361 Triple self-aligned split-gate non-volatile memory device
03/20/2003US20030052360 EEPROM with split gate source side injection with sidewall spacers
03/20/2003US20030052359 Flash memory device and method for fabricating the same
03/20/2003US20030052358 Annealing a polysilicon substrate in nitric oxide to form an oxide layer, nitriding the oxide layer to form a nitride layer, and depositing the dielectric layer onto the nitride layer
03/20/2003US20030052357 Interlayer oxide containing thin films for high dielectric constant application
03/20/2003US20030052354 Use of gate electrode workfunction to improve DRAM refresh
03/20/2003US20030052353 Semiconductor integrated circuit device and manufacturing method thereof
03/20/2003US20030052352 Semiconductor device and method of fabricating the same
03/20/2003US20030052350 Semiconductor device and method of manufacturing
03/20/2003US20030052349 CMOS pixel design for minimization of defect-induced leakage current
03/20/2003US20030052344 Evaluation configuration for semiconductor memories
03/20/2003US20030052342 Method for forming a pattern and a semiconductor device
03/20/2003US20030052341 Semiconductor integrated circuit device
03/20/2003US20030052336 Electro-optical device and electronic equipment
03/20/2003US20030052332 ESD protection circuit having a high triggering threshold
03/20/2003US20030052325 Semiconductor device
03/20/2003US20030052324 Semiconductor device
03/20/2003US20030052320 Memory device having dual tunnel junction memory cells
03/20/2003US20030052271 Micromachined infrared sensitive pixel and infrared imager including same
03/20/2003US20030052252 Solid-state image pickup apparatus and control method thereof
03/20/2003US20030052176 Data processing system and data processing method
03/20/2003US20030052015 A two-layered anode is used for the electrochemical polymerisation.
03/20/2003US20030051324 Method of manufacturing ferroelectric capacitor
03/20/2003CA2459902A1 Method for trimming resistors
03/20/2003CA2454898A1 Electromechanical memory having cell selection circuitry constructed with nanotube technology
03/20/2003CA2454845A1 Nanotube films and articles
03/19/2003EP1294026A2 Method for adjusting ultra-thin SOI MOS transistor threshold voltages
03/19/2003EP1294025A2 Scr electrostatic discharge protection for integrated circuits
03/19/2003EP1294021A1 Capacitor device for a semiconductor circuit arrangement and method for making the same
03/19/2003EP1294018A1 Silicon on insulator substrate and method for manufacturing said substrate
03/19/2003EP1293988A2 Memory cell
03/19/2003EP1293987A1 Nonvolatile semiconductor memory device and method of manufacturing the same
03/19/2003EP1293791A2 Semiconductor integrated circuit device and device for testing same
03/19/2003EP1293788A2 Integrated semiconductor device
03/19/2003EP1292996A2 Multilayer structures as stable hole-injecting electrodes for use in high efficiency organic electronic devices
03/19/2003EP1292992A2 Methods for forming rough ruthenium-containing layers and structures/methods using same
03/19/2003EP1292988A1 Light-emitting devices
03/19/2003EP1292987A2 Trench capacitor dram cell layout
03/19/2003EP1292986A2 Reduction of topography between support regions and array regions of memory devices
03/19/2003EP1292985A2 High resistance conductive polymers for use in high efficiency pixellated organic electronic devices
03/19/2003EP1292983A2 Method of producing trench capacitor buried strap
03/19/2003EP1292979A2 Method and apparatus for a direct buried strap for same level interconnections for semiconductor devices
03/19/2003EP1292975A1 Method for making substrates and resulting substrates
03/19/2003EP1292974A1 Method for making an electronic component with self-aligned drain and gate, in damascene architecture
03/19/2003EP1292967A2 Buried bit line-field plate isolation defined dram cell active areas
03/19/2003EP1292951A2 Structure and process for vertical transistor trench capacitor dram cell
03/19/2003EP1292648A2 Heterostructure with rear-face donor doping
03/19/2003EP1044452B1 Programmable sub-surface aggregating metallization structure and method of making same