Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
08/2012
08/14/2012US8243540 Semiconductor memory device and test method thereof
08/14/2012US8243539 Nonvolatile semiconductor memory device
08/14/2012US8243537 Semiconductor memory
08/14/2012US8243536 Systems and methods for increasing bit density in a memory cell
08/14/2012US8243535 Semiconductor memory device comprising variable delay circuit
08/14/2012US8243534 Semiconductor memory device, memory module including the same, and data processing system
08/14/2012US8243533 Semiconductor memory device and method of operating the same
08/14/2012US8243532 NVM overlapping write method
08/14/2012US8243531 Reference potential generating circuit of semiconductor memory
08/14/2012US8243530 Non-volatile memory device
08/14/2012US8243512 Semiconductor memory write method
08/14/2012US8243509 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
08/14/2012US8243508 Resistive memory devices using assymetrical bitline charging and discharging
08/14/2012US8243496 Resistive memory device and writing method thereof
08/14/2012US8243489 Memory device no common source region and method of fabricating the same
08/14/2012US8242988 Device substrate, light emitting device and driving method of light emitting device
08/14/2012US8242911 Composite multiple RFID tag facility
08/14/2012US8242908 Methods and systems of a multiple radio frequency network node RFID tag
08/14/2012US8242907 Multiple radio frequency network node RFID tag
08/09/2012WO2012106131A1 On-die termination
08/09/2012WO2012106112A1 A passive interface for an electronic memory device
08/09/2012WO2012106079A1 Advanced converters for memory cell sensing and methods
08/09/2012US20120204013 System and apparatus for group floating-point arithmetic operations
08/09/2012US20120201089 Integrated circuit device comprises an interface to transmit a first code, a strobe signal after a delay and data to a dynamic random access memory (dram)
08/09/2012US20120201088 Memory circuit system and method
08/09/2012US20120201086 Signal Margin Improvement For Read Operations In A Cross-Point Memory Array
08/09/2012US20120201085 Low power memory control circuits and methods
08/09/2012DE102007057321B4 Bewertungseinheit in einer Speichervorrichtung Evaluation unit in a memory device
08/08/2012EP2483890A2 Methods and systems for reducing supply and termination noise
08/08/2012CN202373310U Automobile radio-cassette player
08/08/2012CN202373309U Plug-in card repeater
08/08/2012CN202373308U Recording circuit for improving recording quality
08/08/2012CN202373307U USB (Universal Serial Bus) memory device with voice-playing function
08/08/2012CN202373306U Card-reading USB (Universal Serial Bus) flash disk
08/08/2012CN202373129U Automobile remote controller with U disk
08/08/2012CN202372786U Watch
08/08/2012CN202368089U Paper composite book internally provided with U-disk
08/08/2012CN101615427B Management method of nonvolatile memory and controller using same
08/08/2012CN101529519B Sense amplifier with multiple bits sharing a common reference
08/07/2012US8239643 Non-volatile memory and method with control data management
08/07/2012US8239607 System and method for an asynchronous data buffer having buffer write and read pointers
08/07/2012US8238188 Semiconductor memory device changing refresh interval depending on temperature
08/07/2012US8238187 Fast cyclic decoder circuit for FIFO/LIFO data buffer
08/07/2012US8238186 Semiconductor memory device and method for operating the same
08/07/2012US8238185 Non-volatile memory device having temperature compensator and memory system thereof
08/07/2012US8238184 Sense amplifier with a sensing transmission transistor and a reference transmission transistor operating in saturation regions and data sensing method thereof
08/07/2012US8238183 Semiconductor device and data processing system comprising semiconductor device
08/07/2012US8238182 Semiconductor device and data processing system comprising semiconductor device
08/07/2012US8238181 Semiconductor device, circuit of controlling signal lines and method of controlling signal lines
08/07/2012US8238180 Semiconductor memory apparatus
08/07/2012US8238179 Device and method for generating test mode signal
08/07/2012US8238178 Redundancy circuits and operating methods thereof
08/07/2012US8238177 Integrated circuit
08/07/2012US8238176 I/O circuit with phase mixer for slew rate control
08/07/2012US8238175 Semiconductor memory device, memory module including the same, and data processing system
08/07/2012US8238174 Continuous programming of non-volatile memory
08/07/2012US8238173 Using storage cells to perform computation
08/07/2012US8238172 Semiconductor memory device and method for controlling the same
08/07/2012US8238171 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
08/07/2012US8238148 Semiconductor device having architecture for reducing area and semiconductor system including the same
08/07/2012US8238141 VSS-sensing amplifier
08/07/2012US8238140 Semiconductor memory and program
08/07/2012US8238134 Memory module and memory system
08/07/2012US8237143 Phase change memory device
08/07/2012US8234782 Methods of fabricating microelectronic devices
08/02/2012WO2012102785A2 Memory cell with multiple sense mechanisms
08/02/2012WO2012101485A1 Preventing unauthorized data extraction
08/02/2012US20120198194 Multi-Bank Memory Accesses Using Posted Writes
08/02/2012US20120198144 Dynamically setting burst length of double data rate memory device by applying signal to at least one external pin during a read or write transaction
08/02/2012US20120195149 Circuits and methods for providing refresh addresses and alternate refresh addresses to be refreshed
08/02/2012US20120195148 Semiconductor device and information processing system including the same
08/02/2012US20120195147 Bit line precharge circuit and a semiconductor memory apparatus using the same
08/02/2012US20120195146 Local sense amplifier circuit and semiconductor memory device including the same
08/02/2012US20120195145 Semiconductor memory for disconnecting a bit line from a sense amplifier in a standby period and memory system including the semiconductor memory
08/02/2012US20120195143 Semiconductor memory device
08/02/2012US20120195142 Semiconductor memory device
08/02/2012US20120195141 Generic low power strobe based system and method for interfacing memory controller and source synchronous memory
08/02/2012US20120195140 Semiconductor integrated circuit
08/02/2012US20120195139 Multi-power domain design
08/02/2012US20120195138 Internal voltage generating circuit and semiconductor memory device
08/02/2012US20120195137 Semiconductor integrated circuit and control method thereof
08/02/2012US20120195136 Semiconductor device
08/02/2012US20120195135 Semiconductor memory device
08/02/2012US20120195134 Data alignment circuit
08/02/2012US20120195133 Semiconductor memory device having data compression test cicuit
08/02/2012US20120195132 Semiconductor integrated circuit
08/02/2012US20120195131 Memory register encoding apparatus and methods
08/02/2012US20120195111 In-Line Register File Bitcell
08/02/2012US20120195109 Semiconductor storage device
08/02/2012US20120195107 Method for Selectable Guaranteed Write-Through With Early Read Suppression
08/02/2012US20120195106 SRAM Timing Cell Apparatus and Methods
08/02/2012US20120195103 Semiconductor device having complementary bit line pair
08/02/2012US20120195089 Semiconductor memory chip and multi-chip package using the same
08/02/2012US20120194248 Non-linear common coarse delay system and method for delaying data strobe
08/02/2012DE10253696B4 Speichersystem mit einer Vielzahl von getakteten Speichervorrichtungen Memory system having a plurality of clocked storage devices
08/01/2012CN202364361U Earphones with player
08/01/2012CN202364290U Video camera with U disk
08/01/2012CN102623041A Music player and method for automatically adjusting audio output of music player
08/01/2012CN102623040A Data synthesizing and playing system and method
08/01/2012CN102623039A Clock reproducing and timing method in a system having a plurality of devices and memory controller with flexible data alignment
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