| Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428) |
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| 04/05/1988 | US4736321 Communication method between an interactive language processor workspace and external processes |
| 04/05/1988 | US4736320 Computer language structure for process control applications, and translator therefor |
| 04/05/1988 | US4736319 Interrupt mechanism for multiprocessing system having a plurality of interrupt lines in both a global bus and cell buses |
| 04/05/1988 | US4736318 Data processing system having tunable operating system means |
| 04/05/1988 | US4736317 Microprogram-coupled multiple-microprocessor module with 32-bit byte width formed of 8-bit byte width microprocessors |
| 04/05/1988 | US4736292 Electronic data processing system overlaid jump mechanism |
| 04/05/1988 | US4736290 Microprocessors |
| 04/05/1988 | US4736289 Microprogram controlled data processing apparatus |
| 04/05/1988 | US4736288 Data processing device |
| 04/05/1988 | US4735662 Stable ohmic contacts to thin films of p-type tellurium-containing II-VI semiconductors |
| 03/30/1988 | EP0261853A2 System for monitoring operation of object-oriented programs |
| 03/30/1988 | EP0261845A2 Data processing apparatus for extracting documentation text from a source code program |
| 03/30/1988 | EP0261690A2 Method for using descriptor file describing control structures file used by a dump program |
| 03/30/1988 | EP0261685A2 Microprocessor system |
| 03/30/1988 | EP0261628A1 Prefetch apparatus for the overlapped microprogrammed supply of machine instructions in a processor |
| 03/30/1988 | EP0261497A2 Semaphore circuit for shared memory cells |
| 03/30/1988 | EP0261247A1 Method of executing emulation |
| 03/30/1988 | EP0261173A1 Data-flow multiprocessor architecture for efficient signal and data processing |
| 03/30/1988 | EP0046781B1 Cached multiprocessor system with pipeline timing |
| 03/29/1988 | US4734882 For use with a data processing system |
| 03/29/1988 | US4734854 System for generating software source code components |
| 03/29/1988 | US4734852 Mechanism for performing data references to storage in parallel with instruction execution on a reduced instruction-set processor |
| 03/29/1988 | US4734849 Information-processing system having a single chip arithmetic control unit with means for prefetching instructions |
| 03/29/1988 | US4734848 Combination reduction processing method and apparatus |
| 03/29/1988 | CA1234636A1 Method and apparatus for handling interprocessor calls in a multiprocessor system |
| 03/29/1988 | CA1234635A1 Method for controlling execution of application programs written in high level program language |
| 03/29/1988 | CA1234634A1 Adjunct machine |
| 03/24/1988 | WO1988002151A1 Communication interface protocol |
| 03/24/1988 | WO1988002142A1 Data processing system security |
| 03/23/1988 | EP0260837A2 Microprocessor with selective cache memory |
| 03/23/1988 | EP0260639A2 Microprogram sequencer |
| 03/23/1988 | EP0260625A1 Method for bumpless changeover from active units to back-up units in computer equipment and a device for carrying out the method |
| 03/23/1988 | EP0260579A2 A method of establishing communications over a network |
| 03/23/1988 | EP0260568A2 Computer systems speed control at continuous processor speed |
| 03/23/1988 | EP0260458A2 Networking processors |
| 03/23/1988 | EP0260457A2 Networking processors |
| 03/23/1988 | EP0260409A2 Data processing system with two execution units |
| 03/22/1988 | US4733349 Method for recording and managing processing history information using a plurality of storage devices |
| 03/22/1988 | US4733347 Method and apparatus for synchronized concurrent processes |
| 03/22/1988 | US4733346 Data processor with multiple register blocks |
| 03/22/1988 | US4733344 Data processing apparatus for controlling reading out of operands from two buffer storages |
| 03/16/1988 | EP0259704A2 Bitwise implementation mechanism for a circuit design synthesis procedure |
| 03/16/1988 | EP0259702A2 Rule structure in a procedure for synthesis of logic circuits |
| 03/16/1988 | EP0259659A2 A data processing machine including an adapter card driver mechanism |
| 03/15/1988 | US4731817 Multi-processing stored program controlled telecommunication establishment |
| 03/15/1988 | US4731750 Workstation resource sharing |
| 03/15/1988 | US4731736 Method and apparatus for coordinating execution of an instruction by a selected coprocessor |
| 03/15/1988 | US4731735 Multilingual processing for screen image build and command decode in a word processor, with full command, message and help support |
| 03/15/1988 | US4731734 Digital computer system incorporating object-based addressing and access control and tables defining derivation of addresses of data from operands in instructions |
| 03/15/1988 | CA1234223A1 Boolean processor case |
| 03/10/1988 | WO1988001772A1 A system to allocate the resources of a very large scale computer |
| 03/10/1988 | WO1988001771A1 Binary tree parallel processor |
| 03/09/1988 | EP0259135A2 A method and apparatus for arbitration and serialization in a multiprocessor system |
| 03/09/1988 | EP0259095A2 Cache storage queue |
| 03/09/1988 | EP0258867A2 Multitask subscription data retrieval method |
| 03/09/1988 | EP0258736A2 Parallel computer with distributed shared memories and distributed task activating circuits |
| 03/09/1988 | EP0258650A2 Parallel computer system capable of asynchronous data transmission |
| 03/09/1988 | EP0258553A2 Knowledge-based apparatus for troubleshooting employing image for use in plant |
| 03/09/1988 | CN87106067A Very large scale computer |
| 03/08/1988 | US4730315 Diagrammatic method of testing program |
| 03/08/1988 | US4730256 Electronic control apparatus including microcomputers for controlling some of the systems found in a vehicle |
| 03/08/1988 | US4730248 Subroutine link control system and apparatus therefor in a data processing apparatus |
| 03/08/1988 | CA1233908A2 Multilevel controller for a cache memory interface in a multiprocessing system |
| 03/08/1988 | CA1233907A1 Flexible data transmission for message based protocols |
| 03/03/1988 | DE3728495A1 Asynchrone mikro-maschinen/schnittstelle Asynchronous micro-machine / interface |
| 03/03/1988 | DE3629406A1 Method for load distribution among the central processors of a multiprocessor-type common control unit of a switching system |
| 03/02/1988 | EP0257952A2 Apparatus for detecting and classifying errors in control words |
| 03/02/1988 | EP0257655A2 Multitask processing apparatus |
| 03/02/1988 | EP0257650A2 Microprocessor |
| 03/02/1988 | EP0257348A2 Multiprocessor interrupt rerouting mechanism |
| 03/02/1988 | EP0257252A2 Microprocessor |
| 03/02/1988 | EP0056400B1 Memory security circuit |
| 03/01/1988 | US4729096 Method and apparatus for generating a translator program for a compiler/interpreter and for testing the resulting translator program |
| 03/01/1988 | US4729094 Method and apparatus for coordinating execution of an instruction by a coprocessor |
| 03/01/1988 | US4729093 Microcomputer which prioritizes instruction prefetch requests and data operand requests |
| 03/01/1988 | US4729092 Two store data storage apparatus having a prefetch system for the second store |
| 03/01/1988 | US4729091 Directing storage requests prior to address comparator initialization with a reference address range |
| 03/01/1988 | CA1233568A2 Enhanced cpu microbranching architechture |
| 02/25/1988 | WO1988001412A1 Method and apparatus for circuit simulation using parallel processors including memory arrangement and matrix decomposition synchronization |
| 02/24/1988 | EP0256881A2 An automated method for creating a configuration database |
| 02/24/1988 | EP0256358A2 Accelerated validity response permitting early issue of instructions dependent upon outcome of floating point operations |
| 02/24/1988 | EP0256149A1 Computer system |
| 02/24/1988 | EP0256134A1 Central processing unit |
| 02/24/1988 | EP0256133A1 Apparatus for controlling robot |
| 02/24/1988 | CN86207368U Programme control timing bugle generator |
| 02/23/1988 | US4727575 State control for a real-time system utilizing a nonprocedural language |
| 02/23/1988 | US4727491 Personal computer having normal and high speed execution modes |
| 02/23/1988 | US4727487 Resource allocation method in a computer system |
| 02/23/1988 | US4727484 Memory address control apparatus with separate translation look aside buffers for a data processor using a virtual memory technique |
| 02/23/1988 | US4727483 Loop control system for digital processing apparatus |
| 02/23/1988 | US4727480 Emulation of a data processing system |
| 02/23/1988 | US4727476 Simulation and security device for data entry keyboard |
| 02/23/1988 | CA1233270A1 Register selection mechanism and organization of an instruction prefetch buffer |
| 02/23/1988 | CA1233267A1 Modification of device configuration by user |
| 02/23/1988 | CA1233266A1 Configuration capability for devices in an open system |
| 02/23/1988 | CA1233264A1 Data processor having dynamic bus sizing |
| 02/23/1988 | CA1233262A1 Device driver and adapter binding technique |
| 02/23/1988 | CA1233258A1 Programmable controller ("pc") with co-processing architecture |
| 02/18/1988 | DE3626500A1 Method and arrangement for control of advance reading of new instructions of an instruction sequence into the instruction buffer of a data processing system |
| 02/17/1988 | EP0255857A2 Multiple processor system |