| Patents for G06F 15 - Digital computers in general; Data processing equipment in general (227,783) |
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| 09/02/1992 | EP0501901A2 Display station controller |
| 09/02/1992 | EP0501613A2 Heterogeneous software configuration management apparatus |
| 09/02/1992 | EP0501610A2 Object oriented distributed computing system |
| 09/02/1992 | EP0501525A2 Parallel processor |
| 09/02/1992 | EP0501524A2 Parallel processor |
| 09/02/1992 | EP0501474A2 Electronic circuit package |
| 09/02/1992 | EP0501180A2 Dynamic, finite versioning for concurrent transaction and query processing |
| 09/02/1992 | EP0500973A1 Bootstrap routine in an EEPROM |
| 09/02/1992 | EP0500967A1 Method of nonsynchronous access to shared memory |
| 09/02/1992 | CN2114852U Multi-function single-chip learning microcomputer |
| 09/02/1992 | CN1064163A Data acquisition systems with programmable bit-serial digital signal processors |
| 09/02/1992 | CN1018098B Microprocessor bus interface unit |
| 09/01/1992 | USRE34052 Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage |
| 09/01/1992 | US5144692 System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system |
| 09/01/1992 | US5144557 Method and system for document distribution by reference to a first group and particular document to a second group of user in a data processing system |
| 09/01/1992 | US5144293 Serial link communication system with cascaded switches |
| 08/29/1992 | CA2059926A1 Display station controller |
| 08/26/1992 | EP0500222A1 Method for reconciling entries in a plurality of schedules |
| 08/26/1992 | EP0499673A1 Control circuit for a substrate bias generator |
| 08/26/1992 | EP0499620A1 Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
| 08/26/1992 | CA2104788A1 Hand-held data capture system with interchangeable modules and interactive control circuits |
| 08/25/1992 | US5142686 Multiprocessor system having processors and switches with each pair of processors connected through a single switch using Latin square matrix |
| 08/25/1992 | US5142685 Pipeline circuit for timing adjustment of irregular valid and invalid data |
| 08/25/1992 | US5142683 Intercomputer communication control apparatus and method |
| 08/25/1992 | US5142666 Learning system in a neuron computer |
| 08/25/1992 | US5142665 Neural network shell for application programs |
| 08/25/1992 | US5142638 Apparatus for sharing memory in a multiprocessor system |
| 08/25/1992 | US5142629 System for interconnecting MSUs to a computer system |
| 08/25/1992 | US5142626 Personal computer with removable media identification |
| 08/25/1992 | US5142625 One-chip microcomputer including a programmable logic array for interrupt control |
| 08/25/1992 | US5142621 Graphics processing apparatus having instruction which operates separately on X and Y coordinates of pixel location registers |
| 08/25/1992 | US5142590 Pattern recognition system |
| 08/25/1992 | US5142536 Data processor |
| 08/25/1992 | US5142470 Method of maintaining synchronization of a free-running secondary processor |
| 08/25/1992 | CA1306775C Circuit synchronization system |
| 08/20/1992 | WO1992014217A1 Prom compatible processor and read/write method thereof |
| 08/19/1992 | EP0499418A2 A user configurable logic device method and arrangement |
| 08/19/1992 | EP0499129A2 A display apparatus for displaying a window image |
| 08/19/1992 | EP0498953A2 Data acquisition systems with programmable bit-serial digital signal processors |
| 08/18/1992 | US5140689 Data recovery system and method of distributed transaction processing system |
| 08/18/1992 | US5140685 Record lock processing for multiprocessing data system with majority voting |
| 08/18/1992 | US5140681 Multi-processing system and cache apparatus for use in the same |
| 08/18/1992 | US5140593 Method of checking test program in duplex processing apparatus |
| 08/18/1992 | US5140583 Message routing |
| 08/18/1992 | US5140530 Genetic algorithm synthesis of neural networks |
| 08/18/1992 | US5138928 Rhythm pattern learning apparatus |
| 08/18/1992 | CA1306550C Apparatus and method for determining access to a bus |
| 08/14/1992 | CA2061092A1 User configurable logic device method and arrangement |
| 08/12/1992 | EP0498595A2 Flexible single chip digital processor architecture |
| 08/12/1992 | EP0498574A2 Waveform equalizer apparatus formed of neural network, and method of designing same |
| 08/12/1992 | EP0498377A2 Output circuit |
| 08/12/1992 | EP0498307A2 Information processing apparatus |
| 08/12/1992 | EP0498067A2 Microcode generation for a scalable compound instruction set machine |
| 08/12/1992 | EP0497772A1 High performance, low cost microprocessor |
| 08/12/1992 | EP0377022A4 Computing machine with hybrid communication architecture |
| 08/12/1992 | CN1063564A Automatic device configuration for dockable portable computers |
| 08/11/1992 | US5138713 Multiprocessing computer system with exit logic and method for maintaining resource integrity |
| 08/11/1992 | US5138706 Password protected enhancement configuration register for addressing an increased number of adapter circuit boards with target machine emulation capabilities |
| 08/11/1992 | US5138704 Data processing apparatus having a parallel arrangement of data communication and data computation |
| 08/11/1992 | US5138695 Systolic array image processing system |
| 08/11/1992 | US5138694 Parallel processing qualitative reasoning system |
| 08/11/1992 | US5138611 Blocking message transmission or signaling error in response to message addresses in a computer interconnect coupler for clusters of data processing devices |
| 08/11/1992 | US5138566 Fractional/decimal/digital converting calculator |
| 08/11/1992 | US5138548 Method of assuring integrity of information being stored |
| 08/11/1992 | CA1306318C Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
| 08/11/1992 | CA1306312C Write-shared cache circuit for multiprocessor system |
| 08/11/1992 | CA1306309C Multiprocessor intelligent cell for a network which provides sensing, bidirectional communications and control |
| 08/06/1992 | WO1992013313A1 Mixed resolution, n-dimensional object space |
| 08/06/1992 | WO1992013309A1 Method and apparatus for scoped interprocess message switching |
| 08/05/1992 | EP0497628A2 Interrupt controller for a multiprocessor computer system |
| 08/05/1992 | EP0497600A2 Memory access method and apparatus |
| 08/05/1992 | EP0497544A2 Micro-Mainframe link control method and apparatus |
| 08/05/1992 | EP0497054A2 Apparatus and method for a synchronous, high speed, packet-switched bus |
| 08/05/1992 | EP0497029A2 Reconfigurable sequential processor |
| 08/05/1992 | CN2112174U Electronic device with keyboard |
| 08/05/1992 | CN1063374A Mixed-resolution, n-dimensional object space method and apparatus |
| 08/04/1992 | US5136718 Communications arrangement for digital data processing system employing heterogeneous multiple processing nodes |
| 08/04/1992 | US5136717 Realtime systolic, multiple-instruction, single-data parallel computer system |
| 08/04/1992 | US5136716 Session control in network for digital data processing system which supports multiple transfer protocols |
| 08/04/1992 | US5136714 Method and apparatus for implementing inter-processor interrupts using shared memory storage in a multi-processor computer system |
| 08/04/1992 | US5136707 Reliable database administration arrangement |
| 08/04/1992 | US5136701 Processing unit containing DMA controller having concurrent operation with processor wherein addresses and data are divided into two parts |
| 08/04/1992 | US5136691 Methods and apparatus for caching interlock variables in an integrated cache memory |
| 08/04/1992 | US5136687 Categorization automata employing neuronal group selection with reentry |
| 08/04/1992 | US5136581 Arrangement for reserving and allocating a plurality of competing demands for an ordered bus communication network |
| 08/04/1992 | US5136500 Multiple shared memory arrangement wherein multiple processors individually and concurrently access any one of plural memories |
| 08/04/1992 | US5136498 Method for enacting failover of a 1:1 redundant pair of slave processors |
| 08/04/1992 | US5136178 Resistive charge domain synapse cell |
| 08/04/1992 | US5136177 Multi-quadrant charge domain synapse cell |
| 08/04/1992 | US5136176 Charge domain synapse cell |
| 08/04/1992 | US5136146 Terminal apparatus with removable memory device |
| 08/04/1992 | CA1306068C Apparatus and method for servicing interrupts utilizing a pended bus |
| 07/30/1992 | DE4201133A1 Microcomputer system with current saving device for peripherals - isolates microprocessor from external bus and switches off peripherals after executive program transfer to internal memory |
| 07/29/1992 | EP0496585A2 Method and apparatus for solving multiple equations |
| 07/29/1992 | EP0496570A2 Two-level system identifier apparatus with optimization |
| 07/29/1992 | EP0496535A2 Automatic device configuration for dockable computers |
| 07/29/1992 | EP0496297A2 Character data input apparatus |
| 07/29/1992 | EP0496296A2 Handwritten information input apparatus |
| 07/29/1992 | EP0496108A2 Method and apparatus for recognition of a moving object |
| 07/29/1992 | EP0495901A1 Categorization automata employing neuronal group selection with reentry |