| Patents for G06F 15 - Digital computers in general; Data processing equipment in general (227,783) |
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| 03/03/1993 | EP0529866A2 Processor for a multiprocessor system |
| 03/03/1993 | EP0529864A1 Network video server apparatus and method |
| 03/03/1993 | EP0529844A2 Method and apparatus for deriving object type and obtaining object type attribute values |
| 03/03/1993 | EP0529787A2 Network management agent with user created objects |
| 03/03/1993 | EP0529677A1 Multi-channel interface for use in microcomputer |
| 03/03/1993 | EP0529635A2 An image processing apparatus |
| 03/03/1993 | EP0529628A2 Method and apparatus for checking input-output characteristic of neural network |
| 03/03/1993 | EP0529403A2 A queue based technique for handling proof requests in a direct digital color proofing system |
| 03/03/1993 | EP0529344A2 Fault-tolerant system |
| 03/03/1993 | EP0504392A4 Rotating machinery diagnostic system |
| 03/03/1993 | EP0397778A4 An early start mode method and apparatus |
| 03/03/1993 | EP0354899B1 Multiprocessing method and arrangement |
| 03/03/1993 | CN1069579A "Jihe" pocket electronic dictionary |
| 03/02/1993 | US5191654 Microprocessor for high speed data processing |
| 03/02/1993 | US5191652 Method and apparatus for exploiting communications bandwidth as for providing shared memory |
| 03/02/1993 | US5191649 Multiprocessor computer system with data bus and ordered and out-of-order split data transactions |
| 03/02/1993 | US5191648 Image processing system |
| 03/02/1993 | CA1314101C Expert system for security inspection of a digital computer system in a network environment |
| 03/01/1993 | CA2069972A1 Power-up and initialization of a multiprocessor system |
| 02/25/1993 | DE4227251A1 Delay time calculator for logic block contg. MOS transistor - uses layout memory and stores delay times according to input signal gradient for each layout |
| 02/25/1993 | DE4127748A1 Pocket calculator with large display - has numeric key=pad, function keys for calling up computer programs, and cursor keys for selecting input fields |
| 02/24/1993 | EP0528773A1 A system for performing dynamically the configuration of expansion boards on personal computers having a standard bus |
| 02/24/1993 | EP0528703A1 Structure of a set of communicating programmable logic controllers |
| 02/24/1993 | EP0528640A2 Computer system for generating a user interface |
| 02/24/1993 | EP0528570A2 Outputting messages in a data processing system |
| 02/24/1993 | EP0528538A2 Mirrored memory multi processor system |
| 02/24/1993 | EP0528511A2 Neural network quantizers |
| 02/24/1993 | EP0527895A1 Neural network with back propagation controlled through an output confidence measure |
| 02/23/1993 | US5189314 Variable chip-clocking mechanism |
| 02/23/1993 | US5189287 System for inputting, processing and transmitting information and data |
| 02/23/1993 | CA2073540A1 Multiprocessor system, memory managing system therefor, and graphics display system using the multiprocessor system |
| 02/18/1993 | WO1993003442A1 Multiboard multiprocessor connector system |
| 02/18/1993 | WO1993003441A1 System architecture having parallel processor arry |
| 02/18/1993 | DE4226086A1 Microcomputer system - has remote terminal processor operations handled in real time without using CPU to control signal transmission |
| 02/18/1993 | DE4225885A1 Correction and connection structure for neurons - has data subjected to cross correlation and probability comparison to establish connections for neurons in neural network model based upon strength of connections |
| 02/18/1993 | DE4139314C1 Coupling circuit for transputer forming data processing network - uses complementary logic circuits coupled to data interfaces for generating service signals and decodes augmented acknowledge signal at receiver |
| 02/18/1993 | DE4127192A1 Data processing network system - has modules contg. number of CPU units coupled to local network with modules connected onto regional network |
| 02/17/1993 | EP0527622A2 Formula processor |
| 02/17/1993 | EP0527590A2 Distributed application execution |
| 02/17/1993 | EP0527260A1 Interface unit for supporting the communication between processor systems |
| 02/17/1993 | EP0263886B1 Interrupt control method in a multiprocessor system |
| 02/16/1993 | US5187801 Massively-parallel computer system for generating paths in a binomial lattice |
| 02/16/1993 | US5187796 Three-dimensional vector co-processor having I, J, and K register files and I, J, and K execution units |
| 02/16/1993 | US5187795 Pipelined signal processor having a plurality of bidirectional configurable parallel ports that are configurable as individual ports or as coupled pair of ports |
| 02/16/1993 | US5187794 System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices |
| 02/16/1993 | US5187780 Dual-path computer interconnect system with zone manager for packet memory |
| 02/16/1993 | US5187779 Memory controller with synchronous processor bus and asynchronous i/o bus interfaces |
| 02/11/1993 | DE4226052A1 Printer control method e.g. for driving laser LED, LCS printers - coupling master and slave(s) to bus and organising instructions into chain for different pages of data |
| 02/10/1993 | EP0526930A1 A processor buffered interface for multiprocessor systems |
| 02/10/1993 | EP0526911A1 A method and apparatus for coordinating execution of an instruction by a coprocessor |
| 02/10/1993 | CN1068900A Multifunctional computer learning machine with extended slots |
| 02/09/1993 | US5185888 Method and apparatus for data merging/sorting and searching using a plurality of bit-sliced processing units |
| 02/09/1993 | US5185875 Method and apparatus for reducing memory read latency in a shared memory system with multiple processors |
| 02/09/1993 | US5185871 Coordination of out-of-sequence fetching between multiple processors using re-execution of instructions |
| 02/09/1993 | US5185866 Dual mode communication among plurality of processors using three distinct data channels each having different function and operations |
| 02/09/1993 | US5185816 Method of selecting characeteristics data for a data processing system |
| 02/09/1993 | US5185696 Financial calculator capable of displaying graphic representation |
| 02/04/1993 | WO1993002423A1 Communication apparatus and method for transferring image data from a source to one or more receivers |
| 02/04/1993 | WO1993002414A2 Data processing system with synchronization coprocessor for multiple threads |
| 02/04/1993 | DE4125336A1 Electronic hand-book of A4 size - has flat picture screen for reading stored data from exchangeable memory |
| 02/03/1993 | EP0526211A2 A data communication unit |
| 02/03/1993 | EP0526091A2 Multiprocessor system for conducting initial processing for shared circuit |
| 02/03/1993 | EP0525964A2 Apparatus and method for color calibration |
| 02/03/1993 | EP0525831A1 A method and apparatus for coordinating execution of an instruction by a coprocessor |
| 02/03/1993 | EP0525592A2 Information processing system using fractal dimension |
| 02/03/1993 | EP0525543A2 Neural device |
| 02/02/1993 | US5184314 Mobile data processing and communcations system with removable portable computer |
| 02/02/1993 | CA1313416C Method for presenting compressed electronic day calendar information in an interactive information handling system |
| 01/27/1993 | EP0524719A2 Computer system with alterable bootstrapping software |
| 01/27/1993 | EP0524684A2 A universal buffered interface for coupling multiple processors, memory units, and I/O interfaces to a common high-speed bus |
| 01/27/1993 | EP0524683A1 Scientific visualization system |
| 01/27/1993 | EP0524642A2 Register control circuit for initialization of registers |
| 01/27/1993 | EP0524322A1 Circuit for data transfer between data processing systems |
| 01/27/1993 | CN1068434A Dynamic load balancing for multiprocessor pipeline |
| 01/26/1993 | US5182808 Multiprocessor systems having distributed shared resources and deadlock prevention |
| 01/26/1993 | US5182799 Retrieving data using hash memory address generated by reversing /xor bits of selected bit strings of an input packet id |
| 01/26/1993 | US5182798 Multiple material processing system start-up |
| 01/26/1993 | US5182707 Apparatus for recording reagent test strip data by comparison to color lights on a reference panel |
| 01/26/1993 | US5182554 Third party evavesdropping for bus control |
| 01/26/1993 | CA1313276C2 Very large scale computer |
| 01/26/1993 | CA1313275C Parallel processor instruction dispatch apparatus with interrupt handler |
| 01/26/1993 | CA1313273C Dynamic multiple instruction stream multiple data pipeline apparatus for floating-point single instruction stream single data architectures |
| 01/23/1993 | CA2068580A1 Scientific visualization system |
| 01/21/1993 | WO1993001565A1 Single chip page printer controller |
| 01/21/1993 | WO1993001563A1 Risc microprocessor architecture with isolated architectural dependencies |
| 01/21/1993 | WO1993001553A1 Microprocessor architecture capable of supporting multiple heterogeneous processors |
| 01/21/1993 | WO1993001547A1 Risc microprocessor architecture implementing fast trap and exception state |
| 01/21/1993 | WO1993000836A1 Improvements relating to garment pattern making |
| 01/21/1993 | DE4220723A1 Error detection circuit for microcomputer with monitoring timer - compares reference data set with state of internal node pref. in output range of microprogram memory |
| 01/20/1993 | EP0524089A1 Software structure for a data processing system, especially for a telecommunications system |
| 01/20/1993 | EP0524080A2 Information processor for exploiting and acquiring information about user |
| 01/20/1993 | EP0524077A1 Software structure for an information processing system |
| 01/20/1993 | EP0524076A1 Composite software system and method for designing the same |
| 01/20/1993 | EP0523881A2 Data processing system |
| 01/20/1993 | EP0523863A2 Digital data processor for high level instructions |
| 01/20/1993 | EP0523764A2 Computer system having direct bus attachment between processor and dynamic main memory, and having in-processor DMA control with respect to a plurality of data exchange means also connected to said bus, and central processor for use in such computer system |
| 01/20/1993 | EP0523758A2 A method and apparatus for coordinating execution of an instruction by a coprocessor |
| 01/20/1993 | EP0523345A2 Self-parallelizing computer system and method |
| 01/20/1993 | EP0523337A2 Self-scheduling parallel computer system and method |
| 01/19/1993 | US5181017 Adaptive routing in a parallel computing system |