Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
02/1996
02/29/1996DE19530669A1 Verfahren zum automatischen Auswählen eines taktsteuernden Signalpfads in umprogrammierbaren Systemen zur Hardware-Emulation A method for automatically selecting a clock-controlled signal path in reprogrammable hardware emulation systems
02/28/1996EP0699008A1 Method for rerouting a data stream
02/28/1996EP0698850A2 Integrated circuit clocking technique and circuit therefor
02/28/1996EP0698849A1 Semiconductor integrated circuit which can be tested by an LSI tester having a reduced number of pins
02/28/1996EP0698848A1 Method and apparatus for testing an integrated circuit
02/28/1996EP0698847A1 Method and computer for swapping a program package in a multiprocessor system
02/28/1996EP0698239A1 Process for machine monitoring of the operation of a program system
02/28/1996EP0396660B1 Method and apparatus for sensing defects in integrated circuit elements
02/28/1996CN1117766A A method and a system in a distributed operating system
02/28/1996CN1117764A Processor system and debug mode accomplishment method
02/28/1996CN1117613A Common control redundancy switch method
02/27/1996US5495601 Method to off-load host-based DBMS predicate evaluation to a disk controller
02/27/1996US5495599 Information processing system for relocating data and changing status information corresponding to the relocated data
02/27/1996US5495598 System for communicating the state of a designator over a signal line
02/27/1996US5495593 Data processing device
02/27/1996US5495590 Apparatus that processes instructions
02/27/1996US5495589 Architecture for smart control of bi-directional transfer of data
02/27/1996US5495587 Method for processing checkpoint instructions to allow concurrent execution of overlapping instructions
02/27/1996US5495579 Central processor with duplicate basic processing units employing multiplexed cache store control signals to reduce inter-unit conductor count
02/27/1996US5495573 Error logging system with clock rate translation
02/27/1996US5495572 Data reconstruction method and system wherein timing of data reconstruction is controlled in accordance with conditions when a failure occurs
02/27/1996US5495571 Method and system for performing parametric testing of a functional programming interface
02/27/1996US5495570 Mirrored memory multi-processor system
02/27/1996US5495569 Circuit for ensuring that a local interrupt controller in a microprocessor is powered up active
02/27/1996US5495491 System using a memory controller controlling an error correction means to detect and correct memory errors when and over a time interval indicated by registers in the memory controller
02/27/1996US5495488 Arithmetic circuit having a simple structure for producing an error numeric value polynomial and an error locator polynomial
02/27/1996US5495487 Testing buffer/register
02/27/1996US5495474 Switch-based microchannel planar apparatus
02/27/1996US5495451 Apparatus for detecting data input/output states of a plurality of first-in first-out memories
02/27/1996US5495268 Display system for GCU maintenance information
02/25/1996CA2155626A1 Method for a program-package change in a multicomputer system, and computer therefor
02/24/1996CA2156375A1 Method for rerouting a data stream
02/22/1996WO1996005557A1 Accurate digital fault tolerant clock
02/22/1996WO1996005556A1 Computer process resource modelling method and apparatus
02/22/1996WO1996005555A1 Cause inferring device
02/22/1996WO1995034855A3 Automated safestore stack generation and move in a fault tolerant central processor
02/22/1996DE4429556A1 Fault tracing in integrated circuit by comparison of test patterns
02/22/1996DE4429554A1 Automatic testing circuit for manual input device
02/22/1996DE19528017A1 Supervision equipment for amt. of software use
02/22/1996CA2197330A1 Accurate digital fault tolerant clock
02/21/1996EP0697779A1 Procedure to control the load rejection of a real time computer
02/21/1996EP0697661A1 Apparatus for technical diagnosis of errors in a medical system, in particular a dentist's system
02/21/1996EP0697660A1 HMC: a hybrid mirrored and chained data replication method to support high availability for disk arrays
02/21/1996EP0697658A1 Automatic detection and enabling/disabling apparatus for computer memory system parity bits
02/21/1996EP0697652A1 Method for re-executing a process on a computer system for fault correction
02/21/1996CN1117167A Apparatus for generating address data
02/21/1996CN1031084C Computer controlled optimized pairing of disk units
02/20/1996US5493723 Processor with in-system emulation circuitry which uses the same group of terminals to output program counter bits
02/20/1996US5493689 System for configuring an event driven interface including control blocks defining good loop locations in a memory which represent detection of a characteristic pattern
02/20/1996US5493676 Severe environment data recording system
02/20/1996US5493674 Electronic apparatus
02/20/1996US5493673 Method and apparatus for dynamically sampling digital counters to improve statistical accuracy
02/20/1996US5493672 Concurrent simulation of host system at instruction level and input/output system at logic level with two-way communication deadlock resolution
02/20/1996US5493664 Microcomputer that transfers address and control to a debugging routine when an input address is a breakpoint address and a user accessible register for signalling if the breakpoint address is from the cache memory or a main memory
02/20/1996US5493659 Integrated microprocessor
02/20/1996US5493649 Detecting corruption in a computer program at execution time using a checksum
02/20/1996US5493634 Apparatus and method for multi-stage/multi-process decomposing
02/20/1996US5493574 Power efficient RAM disk and a method of emulating a rotating memory disk
02/20/1996US5493507 Digital circuit design assist system for designing hardware units and software units in a desired digital circuit, and method thereof
02/20/1996US5493495 Apparatus for detecting occurrence of failure in anti-skid brake control system for motor vehicle
02/20/1996US5493408 Image processing system having facilitated communication between an image data transmitter and an image processor
02/20/1996US5493364 Equipment control apparatus having means to communicate with a centralized control apparatus
02/20/1996US5493242 Status register with asynchronous read and reset and method for providing same
02/20/1996US5493213 Bar code scanner diagnostic method
02/20/1996CA2099032C Apparatus for redundant cooling of electronic devices
02/20/1996CA2039164C Logical event notification method and apparatus
02/15/1996WO1995029443A3 Machine failure isolation using qualitative physics
02/15/1996DE19529142A1 Automatic identification of faulty points in digital image
02/14/1996EP0696773A1 Redundant array of removable cartridge disk drives
02/14/1996EP0696771A2 A method for programming a data processing system
02/14/1996EP0663092A4 Robust delay fault built-in self-testing method and apparatus.
02/14/1996CN1116789A Recording and/or reproducing system and data backup system
02/14/1996CN1116755A Active matrix panel and method for fabricating the same
02/13/1996US5491828 Integrated data processing system having CPU core and parallel independently operating DSP module utilizing successive approximation analog to digital and PWM for parallel disconnect
02/13/1996US5491819 System and method for merging and separating attributes of consoles
02/13/1996US5491816 Input/ouput controller providing preventive maintenance information regarding a spare I/O unit
02/13/1996US5491815 Method and device for controlling timers associated with multiple users in a data processing system
02/13/1996US5491808 Method for tracking memory allocation in network file server
02/13/1996US5491804 Method and apparatus for automatic initialization of pluggable option cards
02/13/1996US5491793 Debug support in a processor chip
02/13/1996US5491792 Sequence of events system using a redundant analog I/O board system
02/13/1996US5491791 System and method for remote workstation monitoring within a distributed computing environment
02/13/1996US5491790 For use with a processing unit
02/13/1996US5491788 Method of booting a multiprocessor computer where execution is transferring from a first processor to a second processor based on the first processor having had a critical error
02/13/1996US5491787 Fault tolerant digital computer system having two processors which periodically alternate as master and slave
02/13/1996US5491786 Method and system for management of units within a data processing system
02/13/1996US5491706 Display-integrated type tablet device capable of detecting correct coordinates at a tip end of a detection pen by detecting external noise
02/13/1996US5491702 Apparatus for detecting any single bit error, detecting any two bit error, and detecting any three or four bit error in a group of four bits for a 25- or 64-bit data word
02/13/1996US5491701 Burst error corrector
02/13/1996US5491700 Method and apparatus for code error correction using an ordered syndrome and error correction lookup table
02/13/1996US5491698 Setting optimal boundary thresholds in a decoder for coded signal processing channels
02/13/1996US5491625 Information display system for actively redundant computerized process control
02/13/1996US5491442 Multiple frequency output clock generator system
02/08/1996WO1996003823A1 Hierarchical communication system providing intelligent data, program and processing migration
02/08/1996WO1996003732A1 Observation of multiple remote workstations
02/08/1996WO1996003693A1 Compressed memory address parity checking apparatus and method
02/08/1996WO1995032575A3 Network termination equipment
02/08/1996CA2195661A1 Hierarchical communication system providing intelligent data, program and processing migration
02/07/1996EP0695995A1 Inactive state termination tester
02/07/1996EP0695994A1 Debag and system management interrupt