Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
06/2008
06/24/2008US7391274 Low voltage operating ring oscillator with almost constant delay time
06/24/2008US7391273 Clock signal output apparatus and control method of same, and electric apparatus and control method of same
06/24/2008US7391271 Adjustment of PLL bandwidth for jitter control using feedback circuitry
06/24/2008US7391270 Phase locked loop and method for phase correction of a frequency controllable oscillator
06/24/2008US7391255 Semiconductor phase adjustment system module
06/24/2008US7391247 Timing vernier using a delay locked loop
06/24/2008US7391246 Digital high speed programmable delayed locked loop
06/24/2008US7391245 Delay locked loop and method for setting a delay chain
06/24/2008US7391244 Delay-locked loop
06/24/2008US7391243 Low power and low timing jitter phase-lock loop and method
06/19/2008WO2008074000A1 Programmable varactor for vco gain compensation and phase noise reduction
06/19/2008WO2008073744A2 Circuit and method for generating an non-integer fraction output frequency of an input signal
06/19/2008WO2008057182A3 Frequency agile phased locked loop
06/19/2008WO2007076007A3 Method and apparatus for pre-clocking
06/19/2008US20080144423 Timing synchronization circuit with loop counter
06/19/2008US20080143405 Process, voltage, temperature independent switched delay compensation scheme
06/19/2008US20080143404 Delay locked loop circuit for semiconductor memory apparatus
06/19/2008US20080143403 Digital delay locked loop
06/19/2008US20080143402 Digital pulse-width control apparatus
06/19/2008US20080143401 Charge pump circuit
06/19/2008US20080143400 DLL circuit and method of controlling the same
06/19/2008US20080143399 Phase-locked loop circuit, delay locked loop circuit, timing generator, semiconductor test instrument, and semiconductor integrated circuit
06/19/2008US20080143398 Pll Circuit And Design Method Thereof
06/19/2008US20080143397 Method and apparatus for removing the otter on clock signal
06/19/2008US20080143396 Semiconductor device
06/19/2008US20080143395 Method and device for managing a power supply power-on sequence
06/19/2008US20080143391 High Speed Latch Comparators
06/19/2008US20080143318 High frequency delay circuit and test apparatus
06/18/2008EP1933464A1 Adaptive bandwith phase locked loop with feedforward divider
06/18/2008CN101204017A Wireless receiver
06/18/2008CN101204012A Phase-locked loop systems using adaptive low-pass filters in switched bandwidth feedback loops
06/18/2008CN101202730A Method and system for processing signal in a circuit
06/18/2008CN101202559A Apparatus and method for regenerating phase-locked loop reference signal
06/18/2008CN101202546A Self-adapting bandwidth phase locked loop with feedforward frequency divider
06/18/2008CN101202545A High-accuracy data receiving time service instrument
06/18/2008CN101202544A Non-bur CMOS radio frequency divider based on phase switch
06/18/2008CN101202531A Temperature compensation method, apparatus and access point
06/18/2008CN100395961C Phase alignment method for master and stand-by clocks
06/18/2008CN100395957C Phase-locked loop detecting apparatus
06/17/2008US7388939 Fractional-R frequency synthesizer
06/17/2008US7388443 Apparatus and method for wide tuning-range ring oscillators
06/17/2008US7388441 Robust phase-lock detector
06/17/2008US7388439 Low pass filter and electronic device
06/17/2008US7388438 ΣΔ modulator for PLL circuit
06/17/2008US7388437 System and method for tuning a frequency synthesizer
06/17/2008US7388415 Delay locked loop with a function for implementing locking operation periodically during power down mode and locking operation method of the same
06/17/2008US7388414 Wideband power-on reset circuit with glitch-free output
06/17/2008US7388412 Clock multipliers using filter bias of a phase-locked loop and methods of multiplying a clock
06/17/2008US7388407 Variable delay clock synthesizer
06/12/2008WO2008067645A1 Floating dc-offset circuit for phase detector
06/12/2008WO2008006818A3 Radar system
06/12/2008US20080136967 H-sync phase locked loop device and method for a tv video signal
06/12/2008US20080136545 Delay stage with controllably variable capacitive load
06/12/2008US20080136540 Method and system for use of tspc logic for high-speed multi-modulus divider in pll
06/12/2008US20080136536 Phase locked loop with capacitive loop filter
06/12/2008US20080136535 Low phase noise phase locked loops with minimum lock time
06/12/2008US20080136534 Method and system for implementing a low power, high performance fractional-n pll
06/12/2008US20080136533 Method and system for fast pll close-loop settling after open-loop vco calibration
06/12/2008US20080136532 Phase locked loop with adaptive phase error compensation
06/12/2008US20080136531 Adaptive bandwidth phase locked loop with feedforward divider
06/12/2008US20080136485 Delay circuit and delay synchronization loop device
06/12/2008US20080136479 Semiconductor memory device capable of easily performing delay locking operation under high frequency system clock
06/12/2008US20080136478 Apparatus and method of controlling operation frequency in DLL circuit
06/12/2008US20080136477 Delay apparatus for delay locked loop
06/12/2008US20080136476 Delay locked loop
06/12/2008US20080136475 Control of a Variable Delay Line Using Line Entry Point to Modify Line Power Supply Voltage
06/12/2008US20080136474 PLL circuit
06/12/2008US20080136473 Filter circuit arrangement
06/12/2008US20080136472 Power supply circuit for a phase-locked loop
06/12/2008US20080136471 Generating an Output Signal With a Frequency That is a Non-Integer Fraction of an Input Signal
06/12/2008US20080136470 Method and circuit for rapid alignment of signals
06/12/2008US20080136469 Semiconductor integrated circuit device and internal power control system including the same
06/12/2008US20080136400 Dynamic voltage and frequency management in integrated circuits
06/11/2008EP1931033A2 Method and system for mitigating the effects of pulling in multiple phase locked loops in multi-standard systems
06/11/2008EP1929676A2 Rf synthesizer and rf transmitter or receiver incorporating the synthesizer
06/11/2008EP1929633A1 Power supply noise suppressing in a pll-frequency synthesizer
06/11/2008EP1929632A2 Tri-stating a phase locked loop to conserve power
06/11/2008EP1423918B1 Clock data recovery with selectable phase control
06/11/2008EP1354274B1 Serial link architecture
06/11/2008EP1095481B1 Apparatus and method for reducing clock signal phase skew in a master-slave system with multiple latent clock cycles
06/11/2008CN101199120A Low noise divider
06/11/2008CN101197573A Clock pulse generator, self testing and switch control method used on the same
06/11/2008CN101197572A Phase locked loop, semiconductor device, and wireless tag
06/11/2008CN101197571A Automatic switchover phase locking loop
06/11/2008CN101197570A 信号处理电路 The signal processing circuit
06/10/2008US7386085 Method and apparatus for high speed signal recovery
06/10/2008US7386084 Method and system for pattern-independent phase adjustment in a clock and data recovery (CDR) circuit
06/10/2008US7386083 Phase comparator having a flip-flop circuit and a logic circuit
06/10/2008US7386080 High-speed data sampler for optical interconnect
06/10/2008US7386079 Seamless clock
06/10/2008US7386064 Communication semiconductor integrated circuit device and a wireless communication system
06/10/2008US7385477 Radio frequency data communications device
06/10/2008US7385451 Arrangement, phase locked loop and method for noise shaping in a phase-locked loop
06/10/2008US7385432 Commutating phase selector
06/10/2008US7385429 Charge pump with reduced current mismatch
06/10/2008US7385428 Digital delay locked loop capable of correcting duty cycle and its method
06/10/2008CA2356242C Pll and gain control for clock recovery
06/05/2008WO2008067324A1 Linear phase frequency detector and charge pump for phase-locked loop
06/05/2008WO2008067256A1 High resolution digitally controlled oscillator
06/05/2008WO2008067009A1 System and method for reducing transient responses in a phase lock loop with variable oscillator gain
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