Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
07/2008
07/31/2008US20080180144 Phase detector circuit and method therefor
07/31/2008US20080180143 Phase locked circuit
07/31/2008US20080180142 Phase locked loop with phase rotation for spreading spectrum
07/31/2008US20080180140 Method and system for synchronizing phase of triangular signal
07/31/2008DE10393489B4 Verfahren zur automatischen Erkennung der Taktfrequenz eines Systemtaktes für die Konfiguration einer Peripherie-Einrichtung A method for automatic detection of the clock frequency of a system clock for the configuration of a peripheral device
07/31/2008DE10255863B4 Phasenregelschleife Phase-locked loop
07/31/2008DE102007001934B3 Phasenregelkreis Phase-locked loop
07/30/2008EP1950886A1 Phase-locked loop transfer function optimization method and corresponding phase-locked loop circuit
07/30/2008EP1949537A1 Method and apparatus for transceiver frequency synthesis
07/30/2008EP1949492A1 Coaxial resonator based voltage controlled oscillator/phased locked loop sythesizer module
07/30/2008CN101233690A Phase locked loop circuit and phase locked loop control method cross-reference to related applications
07/30/2008CN101233689A Delay-locked loop
07/30/2008CN101232285A DLL circuit and method of controlling the same
07/30/2008CN101231337A High-precision time synchronizing apparatus
07/30/2008CN100407579C 电荷泵、含该电荷泵的时钟恢复电路及含该电路的接收器 The charge pump, including the charge pump clock recovery circuit and a receiver containing the circuit
07/29/2008US7406616 Data de-skew method and system
07/29/2008US7406297 Clock generation circuit and semiconductor device provided therewith
07/29/2008US7406145 Jitter detection circuit
07/29/2008US7406144 Clock generator circuit using phase modulation technology and method thereof
07/29/2008US7405630 Frequency synthesizer with improved spurious performance
07/29/2008US7405628 Technique for switching between input clocks in a phase-locked loop
07/29/2008US7405627 PLL frequency synthesizer
07/29/2008US7405607 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit
07/29/2008US7405604 Variable delay clock circuit and method thereof
07/29/2008US7405603 Delayed Locked Loop Circuit
07/29/2008US7405602 Reset control circuit and reset control method
07/29/2008US7405601 High-speed divider with pulse-width control
07/24/2008WO2008089460A1 Methods and apparatus for dynamic frequency scaling of phase locked loops for microprocessors
07/24/2008WO2008087109A1 Arrangement and method for recovering a carrier signal, and demodulation device
07/24/2008WO2008086895A1 Clock signal generator
07/24/2008WO2007109225A3 Clock generator and clock generating method using delay locked loop
07/24/2008US20080174671 Phase adjusting device and digital camera
07/24/2008US20080174373 Methods and Apparatus for Dynamic Frequency Scaling of Phase Locked Loops for Microprocessors
07/24/2008US20080174361 Apparatus and method for phase lock loop gain control using unit current sources
07/24/2008US20080174350 DLL circuit and method of controlling the same
07/24/2008US20080174349 Wide-locking range phase locked loop circuit using adaptive post division technique
07/24/2008US20080174348 Sub-pixel generation for high speed color laser printers using a clamping technique for PLL (phase locked loop) circuitry
07/24/2008US20080174347 Clock synchronization system and semiconductor integrated circuit
07/24/2008CA2674628A1 Methods and apparatus for dynamic frequency scaling of phase locked loops for microprocessors
07/23/2008CN101228695A Method and apparatus for transceiver frequency synthesis
07/23/2008CN101227268A Device for generating a sampled ramp signal representative of a synchronization signal, and device for assisting the reconstruction of a synchronization signal
07/23/2008CN101227189A Frequency synthesizer and frequency calibration method
07/23/2008CN101227169A Voltage controlled oscillator circuits and operating methods thereof
07/23/2008CN101226683A Numeralization process layer interface processing algorithm
07/22/2008US7403584 Programmable phase interpolator adjustment for ideal data eye sampling
07/22/2008US7403074 Oscillator
07/22/2008US7403073 Phase locked loop and method for adjusting the frequency and phase in the phase locked loop
07/22/2008US7403063 Apparatus and method for tuning center frequency of a filter
07/22/2008US7403053 Power supply dependent delay compensation
07/22/2008US7403052 Power-on detect by measuring thermal voltage
07/22/2008US7403051 Determining voltage level validity for a power-on reset condition
07/22/2008US7403050 Circuits for quickly generating power good signals to motherboard
07/17/2008WO2008086099A1 Pll loop bandwidth calibration
07/17/2008WO2008085456A2 Noise reduction within an electronic device using automatic frequency modulation
07/17/2008WO2008085420A2 Automatic frequency calibration
07/17/2008WO2008084525A1 Method for correcting variation, pll circuit and semiconductor integrated circuit
07/17/2008WO2008084094A1 Phase-locked loop circuit
07/17/2008WO2007136977A3 Methods and apparatus for testing delay locked loops and clock skew
07/17/2008US20080169854 Method and device for determining trim solution
07/17/2008US20080169853 Apparatus for detecting and preventing a lock failure in a delay-locked loop
07/17/2008US20080169852 Delay locked loop circuits and method for controlling the same
07/17/2008US20080169851 Delay locked loop
07/17/2008US20080169850 Phase-locked loop circuit
07/17/2008US20080169849 System and method for implementing a dual-mode PLL to support a data transmission procedure
07/16/2008EP1943743A1 A method and apparatus adapted to demodulate a data signal
07/16/2008EP1943737A2 High resolution auto-tuning for a voltage controlled oscillator
07/16/2008EP1629601B1 A self-calibrated constant-gain tunable oscillator
07/16/2008EP1262022B1 Method and circuit for transmitting data between pseudo-synchronized channels
07/16/2008EP1250638B1 System and method for compensating for supply voltage induced signal delay mismatches
07/16/2008CN101222227A Delay-locked loop circuit and method of generating multiplied clock therefrom
07/16/2008CN101222226A Self-calibration charge pump circuit used for phase-locked loop and its self-calibration feedback loop
07/16/2008CN101221456A Electronic device
07/16/2008CN100403653C Method and apparatus for calibrating acceptable deviation of maximum jitter
07/16/2008CN100403652C Phase detetor and phase detecting method
07/16/2008CN100403204C Efficient current-feedback power supply and applications thereof
07/15/2008US7400210 Voltage controlled oscillator, PLL circuit, pulse modulation signal generating circuit, semiconductor laser modulation device and image forming apparatus
07/15/2008US7400205 Frequency synthesizer and oscillation control method of frequency synthesizer
07/15/2008US7400204 Linear phase detector and charge pump
07/15/2008US7400190 Self calibration of continuous-time filters and systems comprising such filters
07/15/2008US7400188 Voltage providing circuit
07/15/2008US7400182 Clock generator with one pole and method for generating a clock
07/15/2008US7400181 Method and apparatus for delay line control using receive data
07/15/2008US7400180 Semiconductor device having input circuits activated by clocks having different phases
07/15/2008US7400178 Data output clock selection circuit for quad-data rate interface
07/10/2008WO2008083372A1 Systems, modules, chips, circuits and methods with delay trim value updates on power-up
07/10/2008WO2008082994A1 Multiple polarity reversible charge pump circuit and related methods
07/10/2008US20080164957 Frequency-Tunable Oscillator Arrangement
07/10/2008US20080164953 Frequency and/or phase compensated microelectromechanical oscillator
07/10/2008US20080164951 Frequency synthesizer and method for operating a frequency synthesizer
07/10/2008US20080164950 Structure for improved cuttent controlled oscillation device and method having wide frequency change
07/10/2008US20080164923 Delay circuit and electronic device including delay circuit
07/10/2008US20080164922 Data output strobe signal generating circuit and semiconductor memory apparatus having the same
07/10/2008US20080164921 Delay locked loop for high speed semiconductor memory device
07/10/2008US20080164920 DLL circuit and method of controlling the same
07/10/2008US20080164919 Semiconductor memory device and method for driving the same
07/10/2008US20080164918 Pll loop bandwidth calibration
07/10/2008US20080164917 Circuits and methods for implementing sub-integer-n frequency dividers using phase rotators
07/09/2008EP1941615A1 Voltage controlled delay line (vcdl) having embedded multiplexer and interpolation functions
07/09/2008CN101218745A Adaptive frequency calibration device of frequency synthesizer
07/09/2008CN101217277A A non-integer frequency difference eliminator and phase-lock loop that can product non-integer real-time clock signal