Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
10/2006
10/05/2006US20060220690 Voltage Level Detection Circuit
10/05/2006US20060220689 Data input buffer in semiconductor device
10/05/2006US20060220688 Precision tuning of a phase-change resistive element
10/05/2006DE112004002407T5 Oszillator, Frequenzvervielfacher und Prüfvorrichtung Oscillator, frequency multipliers and Tester
10/05/2006DE10313026B4 Vorrichtung mit Phasenregelkreis und Phasenverzögerung sowie Verfahren zum Erzeugen eines Taktsignals Device with phase locked loop and phase delay as well as methods for generating a clock signal
10/04/2006EP1706940A1 High speed comparator
10/04/2006CN1842963A Clock signal input/output device for correcting clock signals
10/04/2006CN1841928A Chopper comparator
10/04/2006CN1278511C Clock restoring circuit
10/04/2006CN1278491C Multiphase timing method and device
10/03/2006US7117382 Variably controlled delay line for read data capture timing window
10/03/2006US7116956 Power oscillator for control of waveshape and amplitude
10/03/2006US7116948 High-speed signal power detection circuit
10/03/2006US7116737 Apparatus for signaling that a predetermined time value has elapsed
10/03/2006US7116298 Active matrix display device
10/03/2006US7116159 Method and apparatus for adjusting an active filter
10/03/2006US7116150 Clock gater circuit and associated method
10/03/2006US7116149 Duty cycle correction circuit of delay locked loop and the delay locked loop having the duty cycle correction circuit
10/03/2006US7116141 Frequency-doubling delay locked loop
10/03/2006US7116140 Circuit arrangement for recognizing and outputting control signals, integrated circuit including the same, and use thereof
10/03/2006US7116134 Voltage comparator
10/03/2006US7116133 Apparatus and method for adjusting clock skew
10/03/2006US7116126 Intelligent delay insertion based on transition
09/2006
09/28/2006WO2006101840A1 Variable delay circuitry
09/28/2006WO2006100626A2 Electronic circuit wherein an asynchronous delay is realized
09/28/2006US20060215746 Low latency digital filter and method
09/28/2006US20060214726 Q value correction of filter circuit
09/28/2006US20060214716 Clock signal input/output device for correcting clock signals
09/28/2006US20060214712 Digital pulse width modulator
09/28/2006US20060214701 Clock generator
09/28/2006US20060214700 Stable systems for comparing and converting signals
09/28/2006US20060214699 Signal detecting system
09/28/2006DE10317279B4 Verzögerungsschaltung Delay circuit
09/28/2006DE10242886B4 Interpolationsschaltung, DLL-Schaltung und integrierte Halbleiterschaltung Interpolation circuit, the DLL circuit and semiconductor integrated circuit
09/27/2006CN1837835A High-frequency clock jitter measuring circuit and calibration method thereof
09/27/2006CN1277415C Mixed-media telecommunication call method and videophone
09/27/2006CN1277353C Frequency multiplication system based on full digital logic circuit
09/26/2006US7113557 Noise canceling method and apparatus
09/26/2006US7113476 Interference cancellation method and receiver
09/26/2006US7113029 Transconductance filter circuit
09/26/2006US7113028 Method and arrangement for calibrating an active filter
09/26/2006US7113019 Method and apparatus to remotely sense the temperature of a power semiconductor
09/26/2006US7113013 Pulse generating circuit and sampling circuit
09/26/2006US7113011 Low power PLL for PWM switching digital control power supply
09/26/2006US7113010 Clock distortion detector using a synchronous mirror delay circuit
09/26/2006US7113006 Capacitor reliability for multiple-voltage power supply systems
09/26/2006US7113003 Presence indication signal associated with an attachment
09/26/2006US7112990 Physical layers
09/21/2006WO2006097132A1 Regeneration device for regenerating signal edges of a signal, arrangement and method for regenerating signal edges of a signal
09/21/2006WO2006073821A3 Method and system for channel equalization and crosstalk estimation in a multicarrier data transmission system
09/21/2006WO2005034354A3 Oscillator circuit, used in particular for mobile radio communication
09/21/2006US20060209946 Methods and devices for shortening the convergence time of blind, adaptive equalizers
09/21/2006US20060209945 Data receiver and equalizer adapter
09/21/2006US20060208784 Circuit for controlling phase with improved linearity of phase change
09/21/2006US20060208768 High speed peak amplitude comparator
09/21/2006US20060208767 Switch control apparatus, semiconductor device test apparatus and sequence pattern generating program
09/20/2006CN1836373A Interference estimation and scaling for efficient metric storage and interference immunity
09/20/2006CN1836196A Delay matching for clock distribution in a logic circuit
09/20/2006CN1276579C Power adaptive frequency divider
09/19/2006US7111187 Information processor and information processing system utilizing interface for synchronizing clock signal
09/19/2006US7110932 Method and circuit arrangement for regulating the operating voltage of a digital circuit
09/19/2006US7110479 Method for determining the quality of a communication channel
09/19/2006US7110449 Decision feedback equalizer
09/19/2006US7110239 Polarity correction circuit and system incorporating the same
09/19/2006US7110017 Signal controlling circuit
09/19/2006US7109966 Display element drive circuit and display device
09/19/2006US7109902 Method and system for sampling a signal
09/19/2006US7109786 Biquad notch filter
09/19/2006US7109781 Temperature compensation for internal inductor resistance
09/19/2006US7109775 Delay circuit having reduced power supply voltage dependency
09/19/2006US7109774 Delay locked loop (DLL) circuit and method for locking clock delay by using the same
09/19/2006US7109768 Closed-loop control of driver slew rate
09/19/2006US7109766 Adjustable frequency delay-locked loop
09/19/2006US7109761 Comparator circuit
09/19/2006US7109758 System and method for reducing short circuit current in a buffer
09/19/2006US7109756 Synchronization of programmable multiplexers and demultiplexers
09/19/2006US7109754 Synchronization of programmable multiplexers and demultiplexers
09/19/2006US7109466 Peak and bottom detectors in burst mode optical receiver
09/14/2006WO2005114845A3 Method and apparatus for synchronizing a clock generator in the presence of jittery clock sources
09/14/2006US20060202747 Filter circuit array, in particular higher-order low-pass filter circuit array
09/14/2006US20060202729 System and method for reduced power open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
09/14/2006US20060202721 Differential comparator with extended common mode voltage range
09/14/2006DE19930113B4 Vorrichtung und Verfahren zum Filtern eines einen digitalen Datenstrom repräsentierenden Signals Device and method for filtering a digital data stream representing signal
09/13/2006EP1701447A2 Input/output interface and semiconductor integrated circuit having input/output interface
09/13/2006EP1701169A1 A method and apparatus for measuring duty cycle
09/13/2006CN1833364A Clock i/o unit
09/13/2006CN1833363A Circuit for producing potentially separated synchronisation impulses from an alternating voltage network
09/13/2006CN1833212A Semiconductor device and driving method of semiconductor device
09/13/2006CN1833175A Timing comparator, data sampling apparatus, and testing apparatus
09/13/2006CN1832463A 数字信号接收电路 The digital signal receiving circuit
09/13/2006CN1832347A Threshold adaptive comparision circuit
09/13/2006CN1832346A Time aligned bussed triggering using synchronized time-stamps and programmable delays
09/13/2006CN1275388C Low power dissipation CMOS type high-voltage drive circuit
09/13/2006CN1275387C Circuit converting sinusoidal signal of coder to bar signal of 1:1 duty ratio
09/13/2006CN1275227C Reproduced signal waveform processor
09/12/2006US7107301 Method and apparatus for reducing latency in a digital signal processing device
09/12/2006US7107031 Co-channel interference rejection in a digital receiver
09/12/2006US7106792 Method and apparatus for estimating the signal to interference-plus-noise ratio of a wireless channel
09/12/2006US7106119 Circuit for the temporary interruption of a sync signal
09/12/2006US7106117 Delayed clock signal generator