Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
06/2007
06/28/2007US20070147491 Transmitter equalization
06/28/2007US20070147490 Filter coefficient adjusting circuit
06/28/2007US20070147489 Uplink burst equalizing method in broad wide access system
06/28/2007US20070146062 Active filer circuit for limiting band of input signal
06/28/2007US20070146049 Semiconductor integrated circuit device
06/28/2007US20070146043 Interface circuit and signal clamping circuit using level-down shifter
06/28/2007US20070146035 Receive clock deskewing method, apparatus, and system
06/28/2007US20070146029 Programmable duty-cycle generator
06/28/2007US20070146019 Time interval trimmed differential capacitance sensor
06/28/2007US20070146017 Semiconductor device
06/28/2007US20070146016 Signal output circuit and power source voltage monitoring device using the same
06/28/2007US20070146015 Comparator circuit and control method thereof
06/28/2007US20070146014 Phase interpolator with adaptive delay adjustment
06/28/2007DE10226066B4 Pegelschieberschaltung und Leistungshalbleitervorrichtung A level shifter circuit and the power semiconductor device
06/28/2007DE102004021398B4 Verfahren und Schaltungsanordnung zum Zurücksetzen einer integrierten Schaltung Method and circuit for resetting an integrated circuit
06/27/2007EP1801971A2 Comparator circuit and control method thereof
06/27/2007EP1801970A1 Pulse generator, timing generator, and pulse width adjusting method
06/27/2007EP1800402A2 Spread frequency spectrum waveform generating circuit
06/27/2007EP1800394A2 Current limiting circuit for high-speed low-side driver outputs
06/27/2007EP1350323B1 Device and method in a semiconductor circuit
06/27/2007EP1230734B1 Adaptive dead time control for push-pull switching circuits
06/27/2007CN1988387A Judging circuit and method for high order single circulation over sampling noise shaping stability
06/27/2007CN1988384A Duty-cycle correction circuit and method for differential clocking
06/27/2007CN1988383A Method for identifying wave form in signal processing
06/26/2007US7237217 Resonant tree driven clock distribution grid
06/26/2007US7236551 Linear half-rate phase detector for clock recovery and method therefor
06/26/2007US7236518 Deskewing differential repeater
06/26/2007US7236464 Flexible method and apparatus for encoding and decoding signals using a time division multiple frequency scheme
06/26/2007US7236051 Programmable glitch filter
06/26/2007US7236020 Pulse translation method from low to high voltage level in half and full bridge application
06/26/2007US7236016 Low voltage comparator
06/26/2007US7236015 Dynamic biasing circuit for continuous time comparators
06/26/2007US7236014 Circuit and method for peak detection of an analog signal
06/26/2007CA2468928C High-speed output circuit with low voltage capability
06/21/2007WO2007069139A2 Electric counter circuit
06/21/2007WO2007069138A2 Electric circuit for and method of generating a clock signal
06/21/2007WO2007038033A3 Method and apparatus for late timing transition detection
06/21/2007US20070139102 Pulse width controller circuit for generating a periodic digital output signal
06/21/2007US20070139093 Interface circuit and signal clamping circuit using level-down shifter
06/21/2007US20070139085 Fast buffer pointer across clock domains
06/21/2007US20070139084 Amplifier circuit having constant output swing range and stable delay time
06/21/2007US20070139083 Input voltage sensing circuit
06/21/2007DE112005001769T5 Oszillatorschaltung und Prüfvorrichtung Oscillator circuit and Tester
06/21/2007DE112005001762T5 Jittereinfügungsschaltung und Prüfvorrichtung Jittereinfügungsschaltung and Tester
06/21/2007DE102006051284A1 Duty cycle correction circuit for use in clock generation circuit, has shared charge pump receiving internal clock signals and outputting control signal based on clock signals, where charge pump compensates duty cycle errors
06/21/2007DE102006002735B3 Duty cycle correction device, especially for DRAM DDRx memory has two delay devices for stepwise varying of the delay between rising and falling flanks, or vice versa, until the signal oscillation is lost for use in evaluation
06/21/2007DE102005060394A1 Schaltungsanordnung und Verfahren zum Betreiben einer Schaltungsanordnung Circuit arrangement and method for operating a circuit arrangement
06/20/2007EP1798921A1 Switch with a pulsed serial link
06/20/2007CN1983832A Method and system for determining filter coefficient
06/20/2007CN1983811A Delay cell and delay line circuit having the same
06/20/2007CN1983800A 变频器和调谐器 Drive and tuner
06/20/2007CN1982899A Peak inspector
06/20/2007CN1322744C Continuous impulse link generator by low-voltage clock signal
06/20/2007CN1322673C Integrated circuit,method and apparatus for fine tuning clock signals of an integrated circuit
06/19/2007US7233638 Sampling clock generator circuit and data receiver using the same
06/19/2007US7233637 Wideband communication using delay line clock multiplier
06/19/2007US7233617 System and method of equalization of high speed signals
06/19/2007US7233186 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit
06/19/2007US7233185 Vernier circuit for fine control of sample time
06/19/2007US7233177 Precision tuning of a phase-change resistive element
06/19/2007US7233176 CMOS input buffer and a method for supporting multiple I/O standards
06/19/2007US7233175 Amplitude limiting circuit
06/19/2007US7233172 Differential amplifier circuit capable of accurately amplifying even high-speeded signal of small amplitude
06/19/2007US7233165 High speed driver for serial communications
06/14/2007WO2007066456A1 Interface circuit
06/14/2007WO2006124117A3 Controlling transient current peaks
06/14/2007US20070132507 Tuneable filters using operational amplifiers
06/14/2007US20070132486 Circuit and method for monitoring a supply voltage and providing an indication when the supply voltage falls below a predetermined threshold
06/14/2007US20070132485 Four-wire signaling system
06/14/2007US20070131019 System and method for calibrating an adjustable delay time for a delay module
06/14/2007DE102005059128A1 Verfahren zur Auswertung einer Bitfolge Method for evaluating a bit sequence
06/14/2007DE102004014448B4 Vorwärtsentzerrer und Verfahren zum analogen Entzerren eines Datensignals Forward equalizer and method for analog equalizing a data signal
06/13/2007EP1794884A1 Method and apparatus for resolving individual signals in detector output data.
06/13/2007CN1981436A Pulse-modulated signal demodulating circuit, and light receiving circuit and electric device having the demodulating circuit
06/13/2007CN1321498C Voltage comparing circuit
06/12/2007US7231266 Digital control device and program
06/12/2007US7230985 Look-ahead decision feedback equalizing receiver
06/12/2007US7230984 Methods and system for equalizing data in multicarrier receiver systems
06/12/2007US7230983 Determine coefficients of a decision feedback equalizer from a sparse channel estimate
06/12/2007US7230982 Decision feedback equalizer for minimum and maximum phase channels
06/12/2007US7230981 Integrated data jitter generator for the testing of high-speed serial interfaces
06/12/2007US7230875 Delay locked loop for use in synchronous dynamic random access memory
06/12/2007US7230498 Delay line for a ring oscillator circuit
06/12/2007US7230468 Systems and methods for providing distributed control signal redundancy among electronic circuits
06/12/2007US7230463 Method and apparatus for controlling transition rates on adjacent interconnects
06/12/2007US7230456 Low current consumption detector circuit and applications
06/07/2007WO2007065040A2 Comparator circuit
06/07/2007WO2007063965A1 Multi-phase oscillator
06/07/2007WO2007063655A1 Program circuit, semiconductor integrated circuit, voltage application method, current application method, and comparison method
06/07/2007US20070127086 Communication apparatus, communication method, image forming apparatus utilizing such method, unit connected to image forming apparatus and image forming system
06/07/2007US20070126482 Highest supply selection circuit
06/07/2007US20070126480 Circuit and method for peak detection of an analog signal
06/06/2007EP1793495A1 Triggering circuit
06/06/2007EP1692765B1 A freqency multiplier
06/06/2007EP1609242A4 High speed track and hold amplifier for direct digital down-conversion
06/06/2007DE102006049909A1 ZQ-Eichergebnis rückkoppelnde DLL-Schaltung und dieselbe enthaltende Halbleitervorrichtung ZQ calibration result rückkoppelnde DLL circuit and semiconductor device containing the same
06/06/2007CN1975443A Apparatus for generating signals against fraudulent using electricity
06/06/2007CN1320758C Transmitter circuit, transmission circuit and driver unit
06/06/2007CN1320753C Method and apparatus for setting the slice level in a binary signal
06/05/2007US7227959 Multi-channel digital feedback reducer system
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