Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
09/2010
09/21/2010US7800435 Audio filter using a diode connected MOSFET
09/21/2010US7800434 Edge detect receiver circuit
09/21/2010US7800425 On-chip mode-setting circuit and method for a chip
09/21/2010US7800412 Fault detection and isolation of redundant signals
09/21/2010US7800410 Integrated circuit having temperature based clock filter
09/16/2010WO2010104164A1 Digital phase comparator
09/16/2010WO2010103614A1 Delay line for differential signal
09/16/2010WO2010103576A1 Data reception circuit
09/16/2010WO2010102382A1 An apparatus and method for generating a timing signal
09/16/2010US20100232804 Methods and systems for polarization multiplexed multilevel modulation for optical communication
09/16/2010US20100231279 Phase Shift Generating Circuit
09/16/2010US20100231278 High power bipolar pulse generators
09/16/2010US20100231277 Semiconductor input/output control circuit
09/16/2010US20100231055 Electronic control systems and methods
09/16/2010CA2744253A1 An apparatus and method for generating a timing signal
09/15/2010CN201584951U Direct current voltage sampling comparison circuit
09/15/2010CN1998208B Apparatus for and method of controlling a digital demodulator coupled to an equalizer
09/15/2010CN101836360A Electronic device and method of correcting clock signal deviations in an electronic device
09/15/2010CN101834587A Duty ratio calibration circuit of precharge logical digital clock
09/15/2010CN101478300B Digital clock duty ratio calibrating circuit
09/14/2010US7796718 Finite-length equalization over multi-input multi-output (MIMO) channels
09/14/2010US7796716 Eliminating narrowband interference in a receiver
09/14/2010US7796714 Multiple signal receiving
09/14/2010US7796682 Method and transceiver system having a transmit clock signal phase that is phase-locked with a receive clock signal phase
09/14/2010US7795957 Power supply circuit for south bridge chip
09/14/2010US7795940 Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures
09/14/2010US7795929 Voltage detection circuit and oscillator using the same
09/09/2010US20100228305 Energy Efficient Defibrillation Current Limiter
09/09/2010US20100226423 Method and apparatus for equalization in clustered channels
09/09/2010US20100225372 Duty cycle correction systems and methods
09/09/2010US20100225370 Frequency-Doubling Delay Locked Loop
09/09/2010US20100225359 Output signal generating device
09/09/2010US20100225358 Method and device for comparator offset cancellation
09/08/2010EP2225829A1 Comparator circuit
09/08/2010EP1829214B1 Track-and-hold peak detector circuit
09/08/2010CN1953330B Delay circuit and image signal processing circuit using the same
09/08/2010CN1677864B Commutating phase selector and its operation and design method
09/08/2010CN101826870A Multiple-phase delay lock loop with full frequency width
09/08/2010CN101826860A Duty ratio correction circuit and duty ratio correction method
09/08/2010CN101826859A Signal source device and signal source device used for generating output signal
09/08/2010CN101452432B Circuit and method for eliminating spurious signal during USB interface data-transmission
09/08/2010CN101170307B Chipset and its time impulse generation method
09/08/2010CN101039108B Delay locked loop circuit and semiconductor integrated circuit device
09/07/2010US7793132 Integrated circuit having frequency dependent noise avoidance
09/07/2010US7792226 Method and apparatus for carrier power and interference-noise estimation in space division multiple access and multiple-input/multiple-output wireless communication systems
09/07/2010US7792225 Method and device for reducing cross-correlation false alarms in CDMA and other wireless networks
09/07/2010US7792187 Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation
09/07/2010US7792186 Multi-pair gigabit ethernet transceiver having a single-state decision feedback equalizer
09/07/2010US7791407 Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing
09/07/2010US7791391 Quadrature phase correction circuit
09/07/2010US7791390 Phase shifter
09/07/2010US7791380 Current sampling method and circuit
09/07/2010US7791379 High-speed reduced-output-swing self-biased fully-complementary CMOS comparator with rail-to-rail input common-mode range
09/02/2010US20100220779 Common broadcast receiver and method for processing a received signal thereof
09/02/2010US20100219883 Active Filter Calibration Method and Apparatus
09/02/2010US20100219882 Circuit arrangement with interference protection
09/02/2010US20100219863 Method and Apparatus for Gamma Ray Detection
09/01/2010EP2224593A2 Track-and-hold peak detector circuit
09/01/2010EP2223193A1 Glitch free 2-way clock switch
09/01/2010EP1303914B1 Circuit for generating an inverse signal of a digital signal with a minimal delay difference between the inverse signal and the digital signal
09/01/2010CN201570079U False identifying instrument
09/01/2010CN101820282A Low-jitter and wide-bandwidth frequency synthesizer system suitable for low-voltage operation
09/01/2010CN101820273A Frequency comparator
09/01/2010CN101820272A Level shift circuit and switching circuit including the same
09/01/2010CN101820271A Electric pulse shaping device for light pulse shaping
09/01/2010CN101442300B Apparatus for generating digital ultra-wideband pulse with adjustable pulse width
09/01/2010CN101267193B Semiconductor integrated circuit performing a voltage comparison and preventing deterioration of voltage comparison accuracy
09/01/2010CN101236731B Liquid crystal display device and method of driving the same
08/2010
08/31/2010US7787535 Method for calculating filter coefficients for an equaliser in a communication receiver using hermitian optimisation
08/31/2010US7787532 Apparatus and method for multiuser detection in CDMA communication system
08/31/2010US7787202 Guided target search for hard disk drive applications
08/31/2010US7786968 Pulse output circuit, driving circuit for display device and display device using the pulse output circuit, and pulse output method
08/31/2010US7786781 Pseudo-random pulse width modulation for high resolution fan control
08/31/2010US7786780 Clock doubler circuit and method
08/31/2010US7786779 Buffer for driving circuit and method thereof
08/31/2010US7786778 Output voltage slew rate control in hard disk motor drive
08/31/2010US7786777 Circuit arrangement and method for the provision of a clock signal with an adjustable duty cycle
08/31/2010US7786766 Appliance control system with a zero crossing detecting circuit
08/31/2010US7786765 Low voltage shutdown circuit
08/31/2010US7786764 Signal receiver and voltage compensation method thereof
08/26/2010WO2010096069A1 Video top-of-frame signal generator for multiple video formats
08/26/2010WO2010095378A1 Output device and testing device
08/26/2010WO2010095095A2 Pulse-shrinking delay line based on feed forward
08/26/2010US20100215091 Adaptive Equalization Using Correlation of Edge Samples With Data Patterns
08/26/2010US20100213983 Amplifiers with input offset trim and methods
08/25/2010EP2221970A2 Clock control circuit and clock control method
08/25/2010EP2221969A2 Clock control circuit and clock control method
08/25/2010EP2221968A2 Interpolator
08/25/2010EP2220769A1 Method and apparatus for reconfigurable frequency generation
08/25/2010EP2220766A1 Clock reproducing and timing method in a system having a plurality of devices and memory controller with flexible data alignment
08/25/2010CN101814907A Signal delay circuit and oscillator using signal delay circuit
08/25/2010CN101814906A Duty correction circuit
08/25/2010CN101813956A Advanced phase number control for multiphase converters
08/25/2010CN101330285B Signal time-delay integrated circuit
08/24/2010US7782908 Method and a feed circuit for feeding a stream of digital transmission data into a transmission medium having frequency suppression
08/24/2010US7782127 Multi-mode reconstruction filter
08/24/2010US7782126 Detection and accommodation of hot-plug conditions
08/24/2010US7782096 Track-and-hold circuit with low distortion
08/24/2010US7782095 Signal comparison circuit
08/24/2010US7782094 Apparatus for sensing an output current in a communications device
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