Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
10/2010
10/21/2010US20100264837 Peak detection with digital conversion
10/20/2010EP2242178A1 Digital phase shifting for imparting a target delay on an input signal to generate an output signal
10/20/2010EP1183780B1 Electronic circuit provided with a digital driver for driving a capacitive load
10/20/2010CN101867376A Clock synchronous circuit
10/20/2010CN101867366A Triangular wave generator with variable frequency and amplitude
10/20/2010CN101867358A Delay circuit
10/20/2010CN101867357A Circuit for changing frequency of a signal and frequency change method thereof
10/20/2010CN101867356A Spread spectrum clock generating circuit with power-saving control
10/20/2010CN101018051B Clock and data recovery circuit
10/19/2010USRE41831 Class B driver
10/19/2010US7817978 Method for eliminating interference in measuring signals
10/19/2010US7817762 Method and apparatus for detecting leading pulse edges
10/19/2010US7817755 System, device and method for generating a logarithmic function according to a plurality of communication signals
10/19/2010US7817735 Device and method of performing channel estimation for OFDM-based wireless communication system
10/19/2010US7817714 Integrating receiver having adaptive feedback equalizer function to simultaneously remove inter-symbol interference and high frequency noises and system having the same
10/19/2010US7817711 Delay line correlator
10/19/2010US7817674 Output clock adjustment for a digital I/O between physical layer device and media access controller
10/19/2010US7817114 Driver with driving current interruption
10/19/2010US7816978 Operating circuit with RC calibration and RC calibration method
10/19/2010US7816952 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method
10/14/2010WO2010095095A3 Pulse-shrinking delay line based on feed forward
10/14/2010US20100259430 Power-supply-noise cancelling circuit and solid-state imaging device
10/13/2010EP2239849A2 Apparatus and method for compensating for process, voltage, and temperature variation of the time delay of a digital delay line
10/13/2010EP2239848A2 Hardening of self-timed circuits against glitches
10/13/2010EP2239842A1 Amplifier circuit with reduced phase noise
10/13/2010EP2238708A1 Apparatus and methods for differential signal receiving
10/13/2010EP1371137B1 High speed latch comparators
10/13/2010EP1238456B1 Improved floating, balanced output circuit
10/13/2010CN201607633U 一种超低功耗红外线感应垃圾桶控制器 An ultra-low-power infrared sensor trash Controller
10/13/2010CN1941623B Adjustable delay cells and delay lines including the same
10/13/2010CN1667750B Apparatus for generating internal clock signal
10/13/2010CN101860366A Highly configurable PLL architecture for programmable logic device
10/13/2010CN101860352A Broad-band active delay line
10/13/2010CN101860351A Circuit for cancelling pulse interference
10/13/2010CN101116245B Method and apparatus for initializing a delay locked loop
10/12/2010US7813424 Method and apparatus for compensating for mismatch occurring in radio frequency quadrature transceiver using direct-conversion scheme
10/12/2010US7813423 Fast adaptive time domain hybrid equalizer for time reversal-space time block code system
10/12/2010US7813422 Adaptive equalizer with tap coefficient averaging
10/12/2010US7812645 Signal converting circuit
10/07/2010WO2010112969A1 Clock glitch detection
10/07/2010US20100253558 Processing apparatus for calibrating analog filter according to frequency-related characteristic of analog filter, processing apparatus for generating compensation parameter used to calibrate analog filter, related communication device, and methods thereof
10/07/2010US20100253410 Clamp protection circuit and a pfc control circuit employing such clamp protection circuit
10/07/2010US20100253408 Timing generating circuit and phase shift circuit
10/07/2010US20100253390 Semiconductor package, stacked semiconductor package having the same, and a method for selecting one semiconductor chip in a stacked semiconductor package
10/07/2010DE10066421B4 Variable delay circuit with reference delay unit
10/06/2010EP2235825A1 An image sensor and a configuration for improved skew time
10/06/2010EP2235824A2 High-frequency counter
10/06/2010EP2235823A1 Programmable delay circuit with integer and fractional time resolution
10/06/2010CN1988387B Judging circuit and method for high order single circulation over sampling noise shaping stability
10/06/2010CN1904981B Display driver circuit
10/06/2010CN101855878A Duty-cycle modulated transmission
10/06/2010CN101854162A Method and device for avoiding pulse due to clock switch in phase interpolation circuit
10/06/2010CN101854161A Correcting circuit for data triggering signals in memory controller and correcting method thereof
10/06/2010CN101854159A Electrical fast transient burst generator
10/06/2010CN101072020B Generating circuit of dead zone control driving signal for field effect transistor
10/06/2010CN101002385B Apparatus for and method of controlling a feedforward filter of an equalizer
10/06/2010CN101002384B Apparatus for and method of controlling a feedforward filter of an equalizer
10/05/2010US7809285 Receiving circuit and optical signal receiving circuit
10/05/2010US7809085 Data recovery system for source synchronous data channels
10/05/2010US7809055 Recursive equalization matrix for multiple input multiple output systems
10/05/2010US7809054 One-sample-per-bit decision feedback equalizer (DFE) clock and data recovery
10/05/2010US7808310 Differential band-pass filter having symmetrically interwoven inductors
10/05/2010US7808282 Out-of-band signaling using detector with equalizer, multiplier and comparator
10/05/2010US7808279 Low power, self-gated, pulse triggered clock gating cell
09/2010
09/30/2010WO2010033855A3 Latch structure, frequency divider, and methods for operating same
09/30/2010US20100245149 Comparison circuit and analog-to-digital conversion device
09/30/2010US20100244944 Phase Locked Loop-Based Tuning Adjustable Filter
09/30/2010US20100244943 Filter shaping using a signal cancellation function
09/30/2010US20100244907 Low speed, load independent, slew rate controlled output buffer with no dc power consumption
09/30/2010US20100244884 Test apparatus and driver circuit
09/30/2010DE102010009199A1 Dynamische Elementanpassung für Verzögerungsleitungen Dynamic element matching for delay lines
09/29/2010EP1625661B1 Clamping circuit to counter parasitic coupling
09/29/2010CN1926798B Interface apparatus and method for synchronization of data
09/29/2010CN1722753B Telemetering apparatus
09/29/2010CN101849381A Clockless serialization using delay circuits
09/29/2010CN101849356A Hardening of self-timed circuits against glitches
09/29/2010CN101849355A Adjustable duty cycle circuit
09/29/2010CN101847983A Method for processing signals between analog exciter and power amplifier and interface circuit
09/29/2010CN101299317B Plasma display device and drive method thereof
09/29/2010CN101164234B Method for producing a time base for a microcontroller and circuit arrangement therefor
09/28/2010US7805628 High resolution clock signal generator
09/28/2010US7804894 System and method for the adjustment of compensation applied to a signal using filter patterns
09/28/2010US7804893 Feedback of reinterleaved correctly decoded data block to decoder for use in additional channel decoding operations of channel coded word containing data block
09/28/2010US7804345 Hybrid on-chip regulator for limited output high voltage
09/28/2010US7804337 Method and apparatus of SFDR enhancement
09/28/2010US7804336 Track-and-hold circuit with low distortion
09/28/2010US7804335 Alternating current level detection circuit
09/28/2010US7804334 High signal level compliant input/output circuits
09/23/2010WO2010108037A1 Frequency divider with synchronized outputs
09/23/2010WO2010107706A1 A phase shift generating circuit
09/23/2010US20100238992 Radio receiving apparatus and radio receiving method
09/23/2010US20100237919 Method and system for a signal driver using capacitive feedback
09/23/2010US20100237907 Comparator with offset compensation, in particular for analog digital converters
09/23/2010US20100237906 Receiving circuit
09/23/2010DE112004001067B4 Mehrtakterzeuger mit programmierbarer Taktverzögerung More clock generator with programmable clock delay
09/22/2010CN101842982A Latch structure and self-adjusting pulse generator using the latch
09/22/2010CN101313470B Logic block control system and logic block control method
09/22/2010CN101277178B Data and time pulse recovery circuit and grid type digital control oscillator
09/21/2010US7801210 Apparatus and methods for implementing a split equalizer filter for sparse channels
09/21/2010US7801208 System and method for adjusting compensation applied to a signal using filter patterns
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