Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2013
12/10/2013US8604823 Selectively disabled output
12/05/2013WO2013181664A1 Programmable logic circuit architecture using resistive memory elements
12/05/2013WO2013179093A1 Integrated circuit comprising an io buffer driver and method therefor
12/05/2013WO2013179089A1 Sequential logic circuit and method of providing setup timing violation tolerance therefor
12/05/2013WO2013179088A1 Io driver impedance calibration
12/05/2013US20130321057 Integrated circuit comprising at least one digital output port having an adjustable impedance, and corresponding adjustment method
12/05/2013US20130321027 Circuit Arrangements and Methods of Operating the Same
12/05/2013US20130321026 Voltage compensated level-shifter
12/05/2013US20130321025 Programmable logic device
12/04/2013EP2668722A2 High voltage tolerant differential receiver
12/04/2013EP2668720A1 High voltage tolerant receiver
12/04/2013CN203326982U Double threshold logic unit formed by single electron transistor and MOS tubes
12/04/2013CN203326981U General purpose input output (GPIO) multiplexing system being compatible with BOOT chip startup configuration options and level conversion
12/04/2013CN203326980U A peripheral interface circuit capable of effectively removing signal differentials
12/04/2013CN203326979U Non-polar-connection RS485 circuit
12/04/2013CN103430453A High voltage tolerant differential receiver
12/04/2013CN103427827A Restoring circuit and restoring method against positive bias temperature instability
12/04/2013CN103427826A 输出电路 The output circuit
12/04/2013CN103427825A Method and device for clock signal conversion
12/04/2013CN103427824A Cross-voltage domain electric level transfer circuit
12/04/2013CN103427823A Low-voltage differential signal transmission driver circuit
12/04/2013CN102301470B Method and apparatus to reduce footprint of ESD protection within an integrated circuit
12/04/2013CN102104384B Differential delay chain unit and time-to-digital converter comprising same
12/04/2013CN101814911B Semiconductor component and method of determining temperature
12/03/2013US8601254 Configurable reset pin for input/output port
12/03/2013US8598910 Timestamping logic with auto-adjust for varying system frequencies
12/03/2013US8598909 IC with deskewing circuits
12/03/2013US8598907 Configuration context switcher with a clocked storage element
12/03/2013US8598906 Low-power ethernet transmitter
12/03/2013US8598904 Electrical networks and methods of forming the same
12/03/2013US8598792 Driving circuit for powering LED light sources
11/2013
11/28/2013WO2013176649A1 Systems and methods for biasing a bus
11/28/2013WO2013176199A1 Programmable logic device and semiconductor device
11/28/2013WO2013175577A1 Signal outputting apparatus, communication system, signal outputting method, and communication method
11/28/2013US20130315005 Input buffer
11/28/2013US20130314126 Non-Overlapping Clock Generator Circuit and Method
11/28/2013US20130314125 Method for driving semiconductor device
11/28/2013US20130314124 Programmable logic device and semiconductor device
11/28/2013US20130314123 Lookup table and programmable logic device including lookup table
11/28/2013US20130314122 Application-specific integrated circuit equivalents of programmable logic and associated methods
11/27/2013CN203313154U Signal isolating and converting circuit
11/27/2013CN203313153U SIM card connection circuit for vehicle-mounted terminal
11/27/2013CN203313152U Combined switch push-pull pulse output unit
11/27/2013CN203313151U Device and system for improving load independent buffers
11/27/2013CN203313150U Switching value signal interface circuit for two-wire system sensor
11/27/2013CN203311205U Switching value input and output multiplexing circuit of heat pump controller
11/27/2013CN103415886A Using low voltage regulator to supply power to a source-biased power domain
11/27/2013CN103414460A Winner-take-all lattice circuit
11/27/2013CN103414459A Analog signal input control circuit with forbidding/enabling functions
11/27/2013CN103414458A Activation circuit, diagnosis tool and initialization tool for universal tire pressure monitoring system sensor
11/27/2013CN102075176B Electric potential converting circuit
11/26/2013US8595683 Generating user clocks for a prototyping environment
11/26/2013US8595671 Low-power FPGA circuits and methods
11/26/2013US8593875 Device and method for enabling multi-value digital computation
11/26/2013US8593180 Circuit including a negative differential resistance (NDR) device having a graphene channel, and method of operating the circuit
11/26/2013US8593179 Delay circuit and inverter for semiconductor integrated device
11/26/2013US8593178 CMOS logic circuit
11/26/2013US8593177 Integrated circuit with timing aware clock-tree and method for designing such an integrated circuit
11/26/2013US8593176 One phase logic
11/26/2013US8593175 Boolean logic in a state machine lattice
11/26/2013US8593174 Omnibus logic element for packing or fracturing
11/26/2013US8593173 Programmable logic sensing in magnetic random access memory
11/26/2013US8593172 Secure reconfiguration of programmable logic
11/26/2013US8593170 Method and device for testing TSVS in a 3D chip stack
11/21/2013US20130311961 Timing exact design conversions from fpga to asic
11/21/2013US20130308408 Input buffer
11/21/2013US20130307585 Semiconductor integrated circuit
11/21/2013US20130307584 Multi-valued on-die termination
11/21/2013US20130307583 Adjustable data drivers and methods for driving data signals
11/21/2013US20130307581 Digital noise protection circuit and method
11/21/2013US20130307580 Majority dominant power scheme for repeated structures and structures thereof
11/21/2013US20130307579 Test system and logic signal voltage level conversion device
11/21/2013US20130307578 Tamper resistant ic
11/21/2013DE102004041927B4 Schaltungsanordnung mit einem Pegelumsetzer und einem Spannungsregler Circuit arrangement having a level converter and a voltage regulator
11/20/2013EP2664067A1 Extending a processor system within an integrated circuit
11/20/2013EP2664066A1 Power management within an integrated circuit
11/20/2013EP2515334B1 ESD protection circuit
11/20/2013CN203301585U Digit dispatcher station recording interface control potential switching circuit apparatus
11/20/2013CN203301453U Optoelectronic coupler and converter
11/20/2013CN203301452U SET/CMOS (single-electron transistor/complementary metal oxide semiconductor) latch register based on negative differential resistance properties
11/20/2013CN203301430U CMOS amplifier capable of reinforcing sink current and driving capacitive load
11/20/2013CN203301342U Switch driver circuit and power system
11/20/2013CN103401552A Function module capable of preventing protection misoperation caused by analog quantity signal hopping
11/20/2013CN103401551A Method and device for sampling high-speed serial signal in SerDes technology
11/20/2013CN103401550A Driving method and device for interface circuits pads of chip
11/20/2013CN103401547A Single-line bidirectional three-voltage setting interface circuit
11/20/2013CN102057437B Semiconductor memory device
11/20/2013CN101877244B 非易失性现场可编程门阵列 Non-volatile field-programmable gate array
11/20/2013CN101825916B 电脑系统 Computer system
11/19/2013US8589466 Ternary and multi-value digital signal scramblers, decramblers and sequence generators
11/19/2013US8587344 Power efficient multiplexer
11/19/2013US8587343 Reconfigurable dynamic logic gate with linear core
11/19/2013US8587342 Semiconductor integrated circuit
11/19/2013US8587341 Integrated circuit having high pattern regularity
11/19/2013US8587340 Apparatuses including scalable drivers and methods
11/19/2013US8587339 Multi-mode driver with multiple transmitter types and method therefor
11/19/2013US8587337 Method and apparatus for capturing and synchronizing data
11/19/2013US8587336 Reconfigurable logic block, programmable logic device provided with the reconfigurable logic block, and method of fabricating the reconfigurable logic block
11/19/2013US8586991 Semiconductor device
11/14/2013US20130300457 Non-binary decoder architecture and control signal logic for reduced circuit complexity
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