Patents for H03D 3 - Demodulation of angle-modulated oscillations (6,449)
12/2009
12/30/2009CN100576758C System and method for realizing high side and low side injection frequency signal filter
12/29/2009US7639996 Simplified high frequency tuner and tuning method
12/29/2009US7639769 Method and apparatus for providing synchronization in a communication system
12/29/2009US7639759 Carrier to noise ratio estimations from a received signal
12/24/2009US20090318107 DC Offset, Re-Radiation, and I/Q Solutions Using Universal Frequency Translation Technology
12/24/2009US20090316849 Method and system for rf signal generation utilizing a synchronous multi-modulus divider
12/24/2009US20090316848 Apparatus for generating clock signal with jitter and test apparatus including the same
12/24/2009US20090316847 Automatic Synchronization of an Internal Oscillator to an External Frequency Reference
12/24/2009US20090316514 Delay Locked Loop Implementation in a Synchronous Dynamic Random Access Memory
12/23/2009CN101610067A Frequency mixer
12/22/2009US7636558 Direct conversion tuner
12/22/2009US7636409 Digital phase locked loop for regenerating the clock of an embedded signal
12/16/2009CN101605115A Method for realizing passive oriented buoy digital de-multiplexer
12/15/2009US7634039 Delay-locked loop with dynamically biased charge pump
12/15/2009US7634038 Wideband phase-locked loop with adaptive frequency response that tracks a reference
12/15/2009US7634037 Digital phase-locked loop circuit and a method thereof
12/15/2009CA2313139C Receiver with sigma-delta analog-to-digital converter
12/09/2009EP2130295A1 Lock-in amplifier and method for filtering a measurement signal using such an amplifier
12/09/2009CN100568708C Self-calibrating apparatus and method in a mobile transceiver
12/08/2009US7630468 Dual-PLL signaling for maintaining synchronization in a communications system
12/03/2009US20090296857 Frequency lock detection
12/02/2009EP2127067A1 Calibration signal generator
12/01/2009US7627302 Apparatus and method for digital image correction in a receiver
12/01/2009US7627072 Frequency-to-current converter
12/01/2009US7627071 Timing synchronization module and method for synchronously playing a media signal
12/01/2009US7627070 Method of detecting the relative positioning of two signals and corresponding device
12/01/2009US7627057 Quadrature alignment in communications receivers
11/2009
11/24/2009US7623595 Digital technique of compensating mismatches between in phase and quadrature channels
11/24/2009US7623594 Satellite receiver system
11/24/2009CA2381999C Improved method and apparatus for up- and down- conversion of radio frequency (rf) signals
11/19/2009US20090285344 Phase Locked Loop with Temperature and Process Compensation
11/18/2009EP2119020A1 Fm receiver
11/17/2009US7620857 Controllable delay device
11/17/2009US7620129 RF power transmission, modulation, and amplification, including embodiments for generating vector modulation control signals
11/17/2009US7620126 Method and apparatus for detecting frequency lock in a system including a frequency synthesizer
11/17/2009US7620124 Direct conversion receiver and receiving method
11/12/2009WO2006126166A3 Demodulator for multi-mode receiver
11/12/2009US20090279655 Fast locking clock and data recovery
11/12/2009US20090278596 Method And System For Communicating Via A Spatial Multilink Repeater
11/11/2009CN100559725C Improvements relating to polyphase receivers
11/10/2009US7616726 Optical disk apparatus and PLL circuit
11/10/2009US7616709 Differential decoder followed by non-linear compensator
11/05/2009US20090274255 Method and apparatus for stabilizing clock
11/03/2009US7613268 Method and apparatus for designing a PLL
11/03/2009US7613267 Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop
11/03/2009US7613265 Systems, methods and computer program products for high speed data transfer using an external clock signal
11/03/2009US7613254 Phase detector for comparing phases of data and a plurality of clocks
10/2009
10/29/2009US20090268859 System and method of controlling power consumption in a digital phase locked loop (dpll)
10/29/2009US20090268853 Multiple input, multiple output channel, digital receiver tuner
10/27/2009US7609799 Circuit, system, and method for multiplexing signals with reduced jitter
10/27/2009US7609797 Circuit, system, and method for preventing a communication system absent a dedicated clocking master from producing a clocking frequency outside an acceptable range
10/27/2009US7609776 Quadrature frequency changer, tuner and modulator
10/27/2009US7609092 Automatic phase-detection circuit for clocks with known ratios
10/27/2009CA2381997C Frequency translator using a non-periodic local oscillator signal
10/22/2009US20090262879 DLL circuit with wide-frequency locking range and error-locking-avoiding function
10/22/2009US20090262875 Communication apparatus
10/22/2009US20090262864 Symmetrical data signal processing
10/20/2009USRE40939 Multi-phase locked loop for data recovery
10/20/2009US7606549 Selective channel tuner and tuning method
10/20/2009US7606542 Simplified high frequency tuner and tuning method
10/20/2009US7606343 Phase-locked-loop with reduced clock jitter
10/15/2009US20090257542 Dual loop clock recovery circuit
10/14/2009EP1147615B1 A homodyne radio receiver
10/13/2009US7602876 Method and apparatus for generating a phase dependent control signal
10/13/2009US7602865 Apparatus and method for enhancing a reception rate of a receiver
10/13/2009US7602862 Mixing module and methods for use therewith
10/08/2009US20090253394 Simplified high frequency tuner and tuning method
10/08/2009US20090251207 Enhanced polar modulator for transmitter
10/07/2009CN101552753A DC offset correction circuit of wireless communication device and correction method thereof
10/06/2009US7599673 Receiver architectures utilizing coarse analog tuning and associated methods
10/06/2009US7599462 Hybrid analog/digital phase-lock loop with high-level event synchronization
10/06/2009US7599461 Method and apparatus for generating one or more clock signals for a decision-feedback equalizer using DFE detected data in the presence of an adverse pattern
10/06/2009US7599246 Delay locked loop implementation in a synchronous dynamic random access memory
10/06/2009US7598803 Combined phase-locked loop and amplitude-locked loop module for switching FM signals
10/06/2009CA2391480C Single chip cmos transmitter/receiver and method of using same
10/01/2009US20090245450 PLL circuit
10/01/2009US20090245448 Adaptation of a digital receiver
10/01/2009US20090245426 Storing log likelihood ratios in interleaved form to reduce hardward memory
09/2009
09/30/2009EP1590886B1 Downconversion of radio frequency (RF) signals
09/29/2009US7596363 Method and system for measuring receiver mixer IQ mismatch
09/29/2009US7596195 Bandpass filter with reversible IQ polarity to enable a high side or low side injection receiver architecture
09/29/2009US7596192 Automatic gain control method for radio communication mobile station
09/24/2009WO2008149258A3 Digital signal processing circuit and method comprising band selection
09/24/2009US20090238308 Ultra low-power transmission system
09/24/2009US20090238307 Digitally controlled phase interpolator circuit
09/24/2009US20090238306 Phase tracking circuit and radio receiver using the same
09/24/2009US20090237155 Generating a phase value for a complex signal
09/23/2009CN101540855A Video apparatus and operation method of video display apparatus
09/22/2009US7593500 Apparatus for coordinating triggering of analog-to-digital conversions relative to pulse width modulation cycle timing
09/22/2009US7593499 Apparatus and method for low power routing of signals in a low voltage differential signaling system
09/17/2009WO2009113014A2 Data processing system
09/17/2009US20090232250 Communication system, receiver and reception method
09/16/2009EP2101458A1 Zero-crossing detector for receiver
09/16/2009EP2101457A1 Demodulator with post-processing circuit for BER improvement
09/16/2009EP2101456A1 Linear combiner
09/16/2009CN100542156C PLL circuit, demodulator circuit, IC card, and IC card processing apparatus
09/16/2009CN100542154C Direct conversion receiver for calibrating phase and gain mismatch
09/15/2009US7590212 System and method for adjusting the phase of a frequency-locked clock
09/15/2009US7590211 Programmable logic device integrated circuit with communications channels having sharing phase-locked-loop circuitry
09/15/2009US7590194 Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer
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