Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
08/2002
08/20/2002US6436766 Process for fabricating high density memory cells using a polysilicon hard mask
08/20/2002US6436765 Method of fabricating a trenched flash memory cell
08/20/2002US6436764 Method for manufacturing a flash memory with split gate cells
08/20/2002US6436763 Process for making embedded DRAM circuits having capacitor under bit-line (CUB)
08/20/2002US6436762 Method for improving bit line to capacitor electrical failures on DRAM circuits using a wet etch-back to improve the bit-line-to-capacitor overlay margins
08/20/2002US6436761 Method for manufacturing semiconductor memory devices
08/20/2002US6436759 Method for fabricating a MOS transistor of an embedded memory
08/20/2002US6436758 Method for forming storage node contact plug of DRAM (dynamic random access memory)
08/20/2002US6436757 Method for fabricating a capacitor having a tantalum oxide dielectrics in a semiconductor device
08/20/2002US6436756 Semiconductor device and fabrication method thereof
08/20/2002US6436755 Dynamic random access memory cell and method for fabricating the same
08/20/2002US6436753 Semiconductor integrated circuit and method for manufacturing the same
08/20/2002US6436751 Fabrication method and structure of a flash memory
08/20/2002US6436750 Method of fabricating integrated circuits having transistors and further semiconductor elements
08/20/2002US6436749 Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion
08/20/2002US6436744 Method and structure for creating high density buried contact for use with SOI processes for high performance logic
08/20/2002US6436741 Semiconductor integrated circuit device
08/20/2002US6436729 Process for producing solid image pickup device and solid image pickup device
08/20/2002US6436725 Method of manufacturing semiconductor device using redundancy technique
08/20/2002US6436612 Method for forming a protection device with slope laterals
08/20/2002US6436526 Magneto-resistance effect element, magneto-resistance effect memory cell, MRAM and method for performing information write to or read from the magneto-resistance effect memory cell
08/20/2002US6436226 Object separating apparatus and method, and method of manufacturing semiconductor substrate
08/20/2002US6436222 Forming preformed images in organic electroluminescent devices
08/15/2002WO2002063929A1 Organic el device
08/15/2002WO2002063928A1 Emitting body, emitting device, and emitting display device
08/15/2002WO2002063697A1 Semiconductor device and its manufacturing method
08/15/2002WO2002063692A1 Structure for protection against radio disturbances
08/15/2002WO2002063691A2 Active pixel cell with charge storage
08/15/2002WO2002063690A1 Semiconductor integrated circuit device and its manufacturing method
08/15/2002WO2002063689A1 System and method for one-time programmed memory
08/15/2002WO2002063681A1 Semiconductor integrated circuit device and its manufacturing method
08/15/2002WO2002063679A1 Method for producing a capacitor assembly for a semiconductor memory device
08/15/2002WO2002063668A1 Method of forming insulating film and method of producing semiconductor device
08/15/2002WO2002063658A2 Self aligned, magnetoresitive random-access memory (mram) structure utilizing a spacer containment scheme
08/15/2002WO2002063633A1 Bi-directional capable bucket brigade circuit
08/15/2002WO2002063629A1 High speed signal path and method
08/15/2002WO2002063339A1 Medical imaging device
08/15/2002WO2002063321A2 Test circuitry of an integrated circuit comprising only one selection element for each signal path
08/15/2002WO2002062802A1 Coumarin derivative, process for producing the same, and luminescent agent and luminescent element each containing the same
08/15/2002WO2002043036A3 Segmented display
08/15/2002WO2002019398A3 Planarization of metal container structures
08/15/2002WO2002019389A3 Epitaxial template and barrier for the integration of functional thin film heterostructures on silicon
08/15/2002WO2002015254A3 Method of manufacturing a trench-gate semiconductor device and corresponding device
08/15/2002WO2001091455A3 Sensor element for an image sensor with a wafer layer structure
08/15/2002WO2001039220A9 Inductor for integrated circuit and methods of manufacture
08/15/2002US20020112137 Partial trench body ties in sram cell
08/15/2002US20020111759 Failure analysis device and failure analysis method
08/15/2002US20020111046 Semiconductor device fabricating method
08/15/2002US20020111035 System and methods for manufacturing and using a mask
08/15/2002US20020111002 Method of selectively forming silicide film of merged dram and logic
08/15/2002US20020110991 Sequential pulse deposition
08/15/2002US20020110989 Semiconductor device, method of manufacturing same and method of designing same
08/15/2002US20020110988 Front stage process of a fully depleted silicon-on-insulator device and a structure thereof
08/15/2002US20020110984 Method of fabricating a trenched flash memory cell
08/15/2002US20020110982 Method for fabricating a semiconductor device
08/15/2002US20020110981 Method for fabricating a semiconductor device
08/15/2002US20020110977 Semiconductor device having concave electrode and convex electrode and method of manufacturing thereof
08/15/2002US20020110976 Dram memory integration method
08/15/2002US20020110974 Dynamic memory based on single electron storage
08/15/2002US20020110973 Fabrication method and structure of a flash memory
08/15/2002US20020110971 Semiconductor memory device with trench-type stacked cell capacitors and method for manufacturing the same
08/15/2002US20020110968 Semiconductor device fabricating method
08/15/2002US20020110967 Method of forming metal lines in an integrated circuit using hard mask spacers
08/15/2002US20020110966 Semiconductor device having multi-layered spacer and method of manufacturing the same
08/15/2002US20020110959 Semiconductor device layout
08/15/2002US20020110954 Semiconductor device and method of fabricating same
08/15/2002US20020110949 Charge-coupled device wafer cover plate with compact interconnect wiring
08/15/2002US20020110941 Semiconductor device and manufacturing method thereof
08/15/2002US20020110940 Process for producing a light emitting device
08/15/2002US20020110936 Inductor recognition method, layout inspection method, computer readable recording medium in which a layout inspection program is recorded and process for a semiconductor device
08/15/2002US20020110935 Method for fabricating a ferroelectric memory configuration
08/15/2002US20020110761 Photolithography patterns
08/15/2002US20020110757 Low cost integrated out-of-plane micro-device structures and method of making
08/15/2002US20020110703 Striped lower electrodes on an insulating substrate, amorphous carbon is filled between them; organic thin film layers formed on filler and lower electrodes, and striped upper electrodes are formed along a second direction
08/15/2002US20020110329 Optoelectronic microelectronic system
08/15/2002US20020110309 Monolithic integrated optical component including a modulator and a heterojunction bipolar transistor
08/15/2002US20020110308 Integrated optoelectronic device and method for making same
08/15/2002US20020110209 Transmission circuit and semiconductor device
08/15/2002US20020110041 Semiconductor memory device with improved setup time and hold time
08/15/2002US20020110039 Memory address and decode circuits with ultra thin body transistors
08/15/2002US20020110036 Static memory cell having independent data holding voltage
08/15/2002US20020110033 Programmable fuse and antifuse and method therefor
08/15/2002US20020110032 Monotonic dynamic-static pseudo-NMOS logic circuit and method of forming a logic gate array
08/15/2002US20020110018 Semiconductor memory device
08/15/2002US20020110017 Voltage generator for semiconductor device
08/15/2002US20020110016 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof
08/15/2002US20020110015 Reduced area sense amplifier isolation layout in a dynamic ram architecture
08/15/2002US20020109798 Pixellated devices such as active matrix liquid crystal displays
08/15/2002US20020109620 A/D converter
08/15/2002US20020109543 Method for reusing resource for designing operational amplifier, layout generating apparatus, and layout generating program
08/15/2002US20020109539 Multi-level non-volatile semiconductor memory device with verify voltages having a smart temperature coefficient
08/15/2002US20020109526 Programmable logic arrays with ultra thin body transistors
08/15/2002US20020109464 Organic electronic device and nonlinear device
08/15/2002US20020109456 Organic electro-luminescent device, manufacturing method for the same, and electronic equipment
08/15/2002US20020109232 Chip structure and process for forming the same
08/15/2002US20020109231 Composite structure of storage node and method of fabrication thereof
08/15/2002US20020109230 Highly linear integrated resistive contact
08/15/2002US20020109223 High-frequency integrated circuit and high-frequency circuit device using the same
08/15/2002US20020109205 Semiconductor device, method of creating pattern of the same, method of manufacturing the same, and apparatus for creating pattern of the same
08/15/2002US20020109202 Diode structure on MOS wafer
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