Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
09/2002
09/04/2002CN1090380C Colour cathode-ray tube
09/03/2002US6446248 Spare cells placement methodology
09/03/2002US6446228 Semiconductor integrated circuit testing apparatus and method of controlling the same
09/03/2002US6445622 Voltage level shifter circuit and nonvolatile semiconductor storage device using the circuit
09/03/2002US6445617 Non-volatile semiconductor memory and methods of driving, operating, and manufacturing this memory
09/03/2002US6445613 Magnetic random access memory
09/03/2002US6445612 MRAM with midpoint generator reference and method for readout
09/03/2002US6445609 Integrated DRAM memory cell and DRAM memory
09/03/2002US6445601 Electrostatic discharge protection circuit
09/03/2002US6445564 Power supply bypass capacitor circuit for reducing power supply noise and semiconductor integrated circuit device having the capacitor circuit
09/03/2002US6445561 Circuit arrangement, in particular for triggering an ignition end stage
09/03/2002US6445414 Solid-state image pickup device having vertical overflow drain and resistive gate charge transfer device and method of controlling thereof
09/03/2002US6445255 Planar dielectric integrated circuit
09/03/2002US6445245 Digitally controlled impedance for I/O of an integrated circuit device
09/03/2002US6445214 Semiconductor integrated circuit
09/03/2002US6445065 Routing driven, metal programmable integrated circuit architecture with multiple types of core cells
09/03/2002US6445057 Semiconductor device having a trimming circuit for suppressing leakage current
09/03/2002US6445056 Semiconductor capacitor device
09/03/2002US6445055 Semiconductor integrated circuit device and manufacturing method thereof
09/03/2002US6445049 Cell based array comprising logic, transfer and drive cells
09/03/2002US6445048 Semiconductor configuration having trenches for isolating doped regions
09/03/2002US6445047 Semiconductor device and method for fabricating the same
09/03/2002US6445046 Memory cell arrangement and process for manufacturing the same
09/03/2002US6445044 Apparatus improving latchup immunity in a dual-polysilicon gate
09/03/2002US6445041 Semiconductor memory cell array with reduced parasitic capacitance between word lines and bit lines
09/03/2002US6445040 Lateral bipolar type input/output protection device
09/03/2002US6445039 System and method for ESD Protection
09/03/2002US6445034 MOS transistor having first and second channel segments with different widths and lengths
09/03/2002US6445032 Floating back gate electrically erasable programmable read-only memory(EEPROM)
09/03/2002US6445031 Byte-switch structure for EEPROM memories
09/03/2002US6445029 NVRAM array device with enhanced write and erase
09/03/2002US6445028 Semiconductor device and method of fabricating the same
09/03/2002US6445027 Multilayer; vapor deposition; tantalum oxynitride
09/03/2002US6445026 Semiconductor device having a memory cell with a plurality of active elements and at least one passive element
09/03/2002US6445023 Diffusion barriers
09/03/2002US6445022 Increasing pixel conversion gain in CMOS image sensors
09/03/2002US6445018 Semiconductor device having signal line above main ground or main VDD line, and manufacturing method thereof
09/03/2002US6445017 Full CMOS SRAM cell
09/03/2002US6445015 Metal sulfide semiconductor transistor devices
09/03/2002US6445014 Retrograde well structure for a CMOS imager
09/03/2002US6445005 EL display device
09/03/2002US6445003 Thin film transistor (TFT) type optical detecting sensor
09/03/2002US6444998 Semiconductor light emitting device and manufacturing method thereof
09/03/2002US6444983 Microbolometer focal plane array with controlled bias
09/03/2002US6444968 CCD imager with separate charge multiplication elements
09/03/2002US6444920 Thin film circuit with component
09/03/2002US6444899 Solar cell and method of fabricating the same
09/03/2002US6444577 Method of fabricating a semiconductor device having increased breakdown voltage
09/03/2002US6444575 Completely etching through variable thickness masking layer and conformal isolation layer interposed between pair of topographic structures, not through layers over structures, to form pairs of patterned layers defining contact via
09/03/2002US6444554 Variation in threshold level of selective transistors is reduced when a shallow structure buried with an insulating film for element isolation is used
09/03/2002US6444548 Bitline diffusion with halo for improved array threshold voltage control
09/03/2002US6444542 Dielectric etching using halogen
09/03/2002US6444538 Forming carbon over active matrix; patterning
09/03/2002US6444530 Process for fabricating an integrated circuit with a self-aligned contact
09/03/2002US6444526 Simplified process for defining the tunnel area in non-aligned, non-volatile semiconductor memory cells
09/03/2002US6444525 Vertical, has two trenches to minimize size
09/03/2002US6444523 Performing channel doping step on substrate so that actual threshold voltage of memory device is greater than preset threshold voltage, forming stack gate on substrate and source/drain region in substrate
09/03/2002US6444522 Forming photoresist pattern exposing portion of semiconductor substrate in which well region will be formed, doping to form well, removing pattern, forming second pattern, doping to form antidiffusion region and second well, thermally activating
09/03/2002US6444517 Creating high q value spiral inductor by increasing metal thickness of inductor
09/03/2002US6444515 Forming on semiconductor substrate gate electrode, hard mask insulating layer, thin insulating layer, nitride stopper layer, sidewall nitride layer, interlayer insulating layer, and interconnection layer formed in contact hole in interlayer
09/03/2002US6444514 Semiconductor integrated circuit device and manufacturing method thereof
09/03/2002US6444512 Dual metal gate transistors for CMOS process
09/03/2002US6444511 New cascaded nmos transistor output circuit with enhanced esd protection is achieved. a driver pmos transistor has the source connected to a voltage supply, the gate connected to the input signal, and the drain connected to the output pad.
09/03/2002US6444510 Parasitic bipolar transistors that are silicided. the first embodiment is a parasitic bipolar junction transistor emitter is formed of the second n+ region and the second n- well. the parasitic base is formed by the p-substrate or well
09/03/2002US6444508 Method of manufacturing thin film transistor
09/03/2002US6444478 Barium-strontium-titanate film, preferably having a thickness of less than about 600 .ang.. according to the present invention, the dielectric film is preferably formed using a chemical vapor deposition process in which an interfacial
09/03/2002US6444405 Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductors substrate
09/03/2002US6444390 Under the conditions in that a germanium film is formed on an amorphous silicon film, a first heat treatment (crystallization step) no defect in its crystal grain.
08/2002
08/29/2002WO2002067426A1 Semiconductor devices
08/29/2002WO2002067425A2 High performance double-gate latch
08/29/2002WO2002067341A1 Method for increasing the curie temperature of magnetoresistive oxides having a double perovskite structure
08/29/2002WO2002067339A1 Methods for forming lateral trench optical detectors
08/29/2002WO2002067337A2 Active pixel sensor for digital imaging
08/29/2002WO2002067336A1 Memory film, method of manufacturing the memory film, memory element, semiconductor storage device, semiconductor integrated circuit, and portable electronic equipment
08/29/2002WO2002067332A2 Semiconductor devices having field shaping regions
08/29/2002WO2002067330A2 Electrode arrangement for charge storage and corresponding production method
08/29/2002WO2002067329A1 Flexible display device
08/29/2002WO2002067328A2 Organic light emitting diode display having shield electrodes
08/29/2002WO2002067327A2 Pixel current driver for organic light emitting diode displays
08/29/2002WO2002067320A1 Semiconductor storage device and semiconductor integrated circuit
08/29/2002WO2002067302A2 Rhodium-rich oxygen barriers
08/29/2002WO2002067266A2 Method for writing into magnetoresistive memory cells and magnetoresistive memory which can be written into according to said method
08/29/2002WO2002067014A1 Wide band gap semiconductor composite detector plates for x-ray digital radiography
08/29/2002WO2002067001A1 Multiple-capture dft system for detecting or locating crossing clock-domain faults during self-test or scan test
08/29/2002WO2002066939A1 Displacement/quantity of light converter
08/29/2002WO2002043156A3 Hemt and communication system using the same
08/29/2002WO2002039455A3 Mram arrangement with selection transistors of large channel width
08/29/2002WO2002033385A3 Biochip excitation and analysis structure
08/29/2002WO2001088976B1 Wireless radio frequency testing methode of integrated circuits and wafers
08/29/2002WO2001006816A9 Optical interference layer for electroluminescent devices
08/29/2002WO2000031779A9 An improved high quality factor capacitor
08/29/2002US20020120911 Pattern layout method of semiconductor device
08/29/2002US20020120896 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
08/29/2002US20020120894 Integrated circuit
08/29/2002US20020120383 Road surface friction sensor and road surface friction coefficient detector, and vehicle antilock braking device
08/29/2002US20020119669 Method of fabricating semiconductor device
08/29/2002US20020119659 Crystal growth method of an oxide and multi-layered structure of oxides
08/29/2002US20020119658 Semiconductor device and method for making the same
08/29/2002US20020119648 Method for fabricating semiconductor device
08/29/2002US20020119645 Method for preventing electron secondary injection in a pocket implantation process