Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
09/2003
09/17/2003EP0960439B1 Antifuse based on silicided polysilicon bipolar transistor
09/17/2003CN2574222Y X-ray image sensor
09/17/2003CN1443371A Configuration in power MOSFET
09/17/2003CN1443367A Bimetallic grid transistor for CMOS procedure
09/17/2003CN1443362A Multilayered capacitor structure with alternately connected concentric lines for deep submicron CMOS
09/17/2003CN1443310A 异步复位电路测试 Asynchronous reset circuit test
09/17/2003CN1443028A Organic electro luminous display device and its manufacturing method
09/17/2003CN1443026A Organic electro luminous screen, organic electroluminous device and manufacturing method of mask
09/17/2003CN1443025A Electro luminous plate and its manufacturing method
09/17/2003CN1443002A Semi conductor integrated circuit and its driving method
09/17/2003CN1442999A Solid camera device and its manufacturing method
09/17/2003CN1442908A Chip structure of insulating layer covered with silicon single crystal and its manufacturing method
09/17/2003CN1442906A Flexible mixed storage element
09/17/2003CN1442905A 半导体装置 Semiconductor device
09/17/2003CN1442904A 半导体装置 Semiconductor device
09/17/2003CN1442903A Variable capacitor and its manufacturing method
09/17/2003CN1442901A Device and method of manufacturing integrated circuit
09/17/2003CN1442897A Method of designing full chip device used on internal storage
09/17/2003CN1442894A Method of automatic aligning to bury N+ type region in quick flash storage element
09/17/2003CN1442860A Magnetic storage device and its manufacturing method
09/17/2003CN1442838A Conductor arrangement layering structure formed in contact hole, manufacturing method of conductor arrangement layering structure and display device having said conductor arrangement layering
09/17/2003CN1121741C Semiconductor device and method forming same
09/17/2003CN1121712C Method for etching Pt film of semiconductor device
09/17/2003CN1121695C Semiconductor memory device
09/17/2003CN1121694C Semiconductor storing device
09/16/2003US6621886 Shift register having fewer lines therein, and liquid crystal display having the same
09/16/2003US6621735 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
09/16/2003US6621733 Segmented bit line EEPROM page architecture
09/16/2003US6621731 Magnetic memory device
09/16/2003US6621730 Magnetic random access memory having a vertical write line
09/16/2003US6621725 Semiconductor memory device with floating storage bulk region and method of manufacturing the same
09/16/2003US6621683 Memory cells with improved reliability
09/16/2003US6621680 5V tolerant corner clamp with keep off circuit and fully distributed slave ESD clamps formed under the bond pads
09/16/2003US6621679 5V tolerant corner clamp with keep off circuit
09/16/2003US6621673 Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate
09/16/2003US6621545 Method for manufacturing a thin film transistor array panel for a liquid crystal display and a photolithography method for fabricating thin films
09/16/2003US6621535 Semiconductor device and method of manufacturing the same
09/16/2003US6621404 Low temperature coefficient resistor
09/16/2003US6621329 Semiconductor device
09/16/2003US6621328 Semiconductor device
09/16/2003US6621327 Substrate voltage selection circuit
09/16/2003US6621325 Structures and methods for selectively applying a well bias to portions of a programmable device
09/16/2003US6621310 Reducing power consumption variability of precharge-pulldown busses
09/16/2003US6621297 Semiconductor device malfunction preventive circuit
09/16/2003US6621285 Semiconductor chip having a pad arrangement that allows for simultaneous testing of a plurality of semiconductor chips
09/16/2003US6621280 Method of testing an integrated circuit
09/16/2003US6621223 Package socket and package legs structure for led and manufacturing of the same
09/16/2003US6621213 Organic electroluminescence device and manufacturing method therefor
09/16/2003US6621171 Semiconductor device having a wire laid between pads
09/16/2003US6621168 Interconnected circuit board assembly and system
09/16/2003US6621146 Method and apparatus for the use of embedded resistance to linearize and improve the matching properties of transistors
09/16/2003US6621143 Precision high-frequency capacitor on semiconductor substrate
09/16/2003US6621142 Precision high-frequency capacitor formed on semiconductor substrate
09/16/2003US6621139 Method for fabricating a tunable, 3-dimensional solenoid and device fabricated
09/16/2003US6621136 Semiconductor device having regions of low substrate capacitance
09/16/2003US6621133 Electrostatic discharge protection device
09/16/2003US6621130 Semiconductor device and an electronic device
09/16/2003US6621129 MROM memory cell structure for storing multi level bit information
09/16/2003US6621128 Method of fabricating a MOS capacitor
09/16/2003US6621127 Semiconductor memory device with miniaturization improvement
09/16/2003US6621126 Multifinger silicon controlled rectifier structure for electrostatic discharge protection
09/16/2003US6621125 Buried channel device structure
09/16/2003US6621123 Semiconductor device, and semiconductor integrated device
09/16/2003US6621121 Vertical MOSFETs having trench-based gate electrodes within deeper trench-based source electrodes
09/16/2003US6621119 Isolated stack-gate flash cell structure and its contactless flash memory arrays
09/16/2003US6621118 MOSFET, semiconductor device using the same and production process therefor
09/16/2003US6621117 Semiconductor device having memory cell and peripheral circuitry with dummy electrode
09/16/2003US6621111 Capacitor structure of semiconductor device and method for forming the same
09/16/2003US6621110 Semiconductor intergrated circuit device and a method of manufacture thereof
09/16/2003US6621109 Charge coupled device with split channeled HCCD
09/16/2003US6621108 Semiconductor device and the process of manufacturing the semiconductor device
09/16/2003US6621107 Trench DMOS transistor with embedded trench schottky rectifier
09/16/2003US6621105 Array of light-emitting elements with multilayer wiring
09/16/2003US6621104 Integrated optoelectronic thin-film sensor and method of producing same
09/16/2003US6621103 Semiconductor device and active matrix type display
09/16/2003US6621095 Method to enhance performance of thermal resistor device
09/16/2003US6621083 High-absorption wide-band pixel for bolometer arrays
09/16/2003US6621064 CMOS photodiode having reduced dark current and improved light sensitivity and responsivity
09/16/2003US6620744 Insulating film formation method, semiconductor device, and production apparatus
09/16/2003US6620728 Top layers of metal for high performance IC's
09/16/2003US6620724 Low resistivity deep trench fill for DRAM and EDRAM applications
09/16/2003US6620717 Memory with disposable ARC for wordline formation
09/16/2003US6620714 Method for reducing oxidation encroachment of stacked gate layer
09/16/2003US6620711 Method of manufacturing a semiconductor device
09/16/2003US6620704 Method of fabricating low stress semiconductor devices with thermal oxide isolation
09/16/2003US6620703 Method of forming an integrated circuit using an isolation trench having a cavity formed by reflowing a doped glass mask layer
09/16/2003US6620701 Method of fabricating a metal-insulator-metal (MIM) capacitor
09/16/2003US6620699 Method for forming inside nitride spacer for deep trench device DRAM cell
09/16/2003US6620694 Method of making non volatile memory with a protective metal line
09/16/2003US6620693 Non-volatile memory and fabrication thereof
09/16/2003US6620690 Method of fabricating flash memory device using self-aligned non-exposure pattern formation process
09/16/2003US6620687 Method of making non-volatile memory with sharp corner
09/16/2003US6620686 Methods of forming capacitors having a polymer on a portion thereof that inhibits the formation of hemispherical grain (HSG) nodules on that portion and capacitors formed thereby
09/16/2003US6620685 Method for fabricating of semiconductor memory device having a metal plug or a landing pad
09/16/2003US6620684 Method of manufacturing nonvolatile memory cell
09/16/2003US6620683 Twin-bit memory cell having shared word lines and shared bit-line contacts for electrically erasable and programmable read-only memory (EEPROM) and method of manufacturing the same
09/16/2003US6620682 Set of three level concurrent word line bias conditions for a nor type flash memory array
09/16/2003US6620681 Semiconductor device having desired gate profile and method of making the same
09/16/2003US6620680 Method of forming a contact structure and a container capacitor structure
09/16/2003US6620679 Method to integrate high performance 1T ram in a CMOS process using asymmetric structure
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