Patents
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
04/1991
04/16/1991US5008786 Recoverable virtual memory having persistant objects
04/16/1991CA1283221C Microprocessor having separate instruction and data interfaces
04/16/1991CA1283220C2 Cache-memory management unit system
04/16/1991CA1283219C2 Cache-memory management unit system
04/10/1991EP0421793A2 Method of control rule generation and method of fuzzy control using the same, and apparatus for automatic control rule generation and fuzzy control apparatus using the same
04/10/1991EP0421696A2 Staggered access memory
04/10/1991EP0421624A2 Portable and dynamic distributed applications architecture
04/10/1991EP0421623A2 Portable and dynamic distributed applications architecture
04/10/1991EP0421622A2 Portable and dynamic distributed applications architecture
04/10/1991EP0421615A2 Data processing method and apparatus for verifying adapter description file choices
04/10/1991EP0421408A2 Joining two database relations on a common field in a parallel relational database field
04/10/1991EP0116600B1 Pre-execution next address calculating mechanism
04/10/1991CN1012325B Operation method for altering data processor and device thereof
04/09/1991US5006980 Pipelined digital CPU with deadlock resolution
04/04/1991WO1991004540A1 Multiple facility operating system architecture
04/04/1991WO1991004536A1 Instruction cache architecture for parallel issuing of multiple instructions
04/04/1991WO1991004535A1 Memory-module for a memory-managed computer system
04/04/1991WO1991004528A1 Cell processor and memory-managed computer system using same
04/03/1991EP0420579A2 Josephson integrated circuit having an output interface capable of providing output data with reduced clock rate
04/03/1991EP0420461A2 Portable and dynamic distributed applications architecture
04/03/1991EP0420457A2 Pipelined computer and methods in the same
04/03/1991EP0420389A1 Logic block for programmable logic devices
04/03/1991EP0420142A2 Parallel processing system
04/03/1991EP0419932A2 Control of the allocation in time of data processing power in a computer system
04/03/1991EP0419499A1 Vector tailgating in computers with vector registers.
04/03/1991CN1050453A Initial bios load for personal computer system
04/03/1991CN1050451A Low-power standby mode computor
04/03/1991CN1012296B 模糊计算机 Fuzzy computer
04/03/1991CN1012293B Lsi microprocessor chip with backwark pin compatibility
04/03/1991CN1012292B Display method of supporting system for software development system
04/02/1991US5005152 Industrial controller with decompilable user program
04/02/1991US5005136 Silicon-compiler method and arrangement
04/02/1991US5005122 Arrangement with cooperating management server node and network service node
04/02/1991US5005121 Integrated CPU and DMA with shared executing unit
04/02/1991US5005119 User interactive control of computer programs and corresponding versions of input/output data flow
04/02/1991US5005118 Method and apparatus for modifying micro-instructions using a macro-instruction pipeline
03/1991
03/30/1991CA2370207A1 Parallel processing system
03/30/1991CA2026553A1 Parallel processing system
03/29/1991CA2026412A1 Solid state disk drive emulation
03/29/1991CA2025170A1 Portable and dynamic distributed applications architecture
03/29/1991CA2025160A1 Portable and dynamic distributed applications architecture
03/29/1991CA2025142A1 Portable and dynamic distributed applications architecture
03/29/1991CA2025131A1 Portable and dynamic distributed applications architecture
03/29/1991CA2025120A1 Portable and dynamic distributed application architecture
03/28/1991DE4026871A1 Microprogrammable processor e.g. for data processing system - has microprogram store subdivided into read-only memory area and random access memory area
03/27/1991EP0419174A2 Data processing apparatus based on microprogram control
03/27/1991EP0419005A2 Loading method and apparatus for computer system
03/27/1991EP0419004A2 Computer system with program loading apparatus and loading method
03/27/1991EP0418980A2 System for combining independently clocked simulators
03/27/1991EP0418932A2 Microcomputer having easily testable interrupt controller
03/27/1991EP0418220A1 Destination control logic for arithmetic and logic unit for digital data processor.
03/26/1991US5003471 Windowed programmable data transferring apparatus which uses a selective number of address offset registers and synchronizes memory access to buffer
03/26/1991US5003468 Guest machine execution control system for virutal machine system
03/26/1991US5003466 Multiprocessing method and arrangement
03/26/1991US5003464 Methods and apparatus for efficient resource allocation
03/26/1991US5003462 Apparatus and method for implementing precise interrupts on a pipelined processor with multiple functional units with separate address translation interrupt means
03/26/1991US5003201 Option/sequence selection circuit with sequence selection first
03/26/1991CA1282181C Method and apparatus for facilitating instruction processing of a digital computer
03/20/1991EP0417916A2 Procedure state descriptor system for digital data processors
03/20/1991EP0417889A2 Protection method and apparatus for computer system
03/20/1991EP0417888A2 Loading method and apparatus for computer system
03/20/1991EP0417883A2 Data processing system with enhanced ease of use
03/20/1991EP0417817A2 System and method for reducing the bandwidth of timing channels in a digital data processing system
03/20/1991EP0417748A2 Interrupt control circuit for use in 1-chip microcomputer
03/20/1991EP0417587A2 Data processor having function of checking undefined addressing prescribed for each of instructions of variable length
03/20/1991EP0239587B1 Instruction sequencer for microprocessor with network for the determination of the phases of instruction cycles
03/20/1991EP0130219B1 Method of preparing part program
03/19/1991US5001666 Multiple interrupt tri-level microprocessor operating system
03/19/1991US5001665 Addressing technique for providing read, modify and write operations in a single data processing cycle with serpentine configured RAMs
03/19/1991US5001662 In digital computer
03/19/1991US5001629 Central processing unit with improved stack register operation
03/19/1991US5001627 Multiprocessor control system for selectively executing vector instructions from scaler units to be executed in a vector unit
03/16/1991CA2025518A1 System and method for reducing timing channels in digital data processing system
03/15/1991WO1991004531A1 Data base system for each of the functions and data processing system for each of the functions
03/15/1991WO1991004529A1 Method of object sensor processing and apparatus therefor
03/15/1991CA2042041A1 Functional database method and functional data processing method
03/13/1991EP0417054A1 Implicit prolog arguments
03/13/1991EP0417013A2 Data processor decoding and executing a train of instructions of variable length
03/13/1991EP0416768A2 Thread private memory storage for multi-thread digital data processors
03/13/1991EP0416767A2 Position independent code location system
03/13/1991EP0416345A2 Instruction decoder for a pipeline processor
03/13/1991EP0416331A2 Line computer
03/13/1991CN1049923A Apparatus and method for preventing unauthorized access to bios in personal computer system
03/12/1991WO1991003784A1 Improved cpu pipeline having register file bypass on update/access address compare
03/12/1991US4999806 Software distribution system
03/12/1991US4999786 Method and apparatus for making inferences using frame-based knowledge representation
03/12/1991US4999554 Method of loading control program for numerical control apparatus
03/12/1991CA1281431C Sequence controller of an instruction processing unit for placing said unit in a ready, go, hold or cancel state
03/07/1991WO1991003016A2 Distributed building of service request lists
03/07/1991WO1991003008A1 System for controlling program of pc
03/07/1991DE4027348A1 Construction model for human interface - uses functionally distributed agents working in conjunction with information generating studio
03/06/1991EP0415895A1 Communication between prolog and an external process
03/06/1991EP0415894A1 Improved prolog addressing
03/06/1991EP0415863A2 Computer system with downward compatibility function
03/06/1991EP0415861A2 Printer initialization system
03/06/1991EP0415637A2 Method and apparatus for simulating a factory system
03/06/1991EP0415573A2 Data processing system
03/06/1991EP0415551A2 Protocol for transfer of DMA data
03/06/1991EP0415548A2 Method and apparatus for controlling initiation of bootstrap loading
03/06/1991EP0415515A2 Computer system