| Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428) |
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| 02/05/1992 | EP0469549A2 Interrupt control unit |
| 02/05/1992 | EP0469507A1 Integrated circuit comprising a standard cell, an application cell and a test cell |
| 02/05/1992 | EP0469485A2 Language processing system using an expanded LR parser |
| 02/05/1992 | EP0469393A2 Arithmetic and logic units |
| 02/05/1992 | EP0469239A2 Small programmable array associated to the on-chip control store for microcode correction |
| 02/05/1992 | EP0469213A1 Method for automating certain human interventions of validating modules in software engineering systems |
| 02/05/1992 | EP0469199A1 Object based system |
| 02/05/1992 | EP0469198A1 Object based system |
| 02/05/1992 | EP0468980A1 Process for determining cycles replaceable by vector commands of a vector computer inside command loops of programs written for von neumann computers. |
| 02/04/1992 | US5086504 Method for performing computer system functions defined by a hierarchial programming language having default nodes |
| 02/04/1992 | US5086461 Apparatus and method for providing existing 1ESS and 1AESS telephone switching equipment with the capability of using the SS7 protocol |
| 02/04/1992 | US5086408 Method and apparatus for merging |
| 02/04/1992 | CA1295423C Method and apparatus for constant stride accessing to memories in vector processor |
| 02/04/1992 | CA1295412C Bootstrap channel security arrangement for communication network |
| 02/03/1992 | WO1992002933A1 Bit storage cell |
| 02/03/1992 | WO1992002932A1 Associative memory |
| 02/03/1992 | WO1992002877A1 Active storage means in a reduction processor |
| 02/03/1992 | WO1992002876A1 Reduction processor |
| 02/03/1992 | WO1992002875A1 A method for performing arithmetic, logical and related operations and a numerical arithmetic unit |
| 02/03/1992 | WO1992002874A1 An arithmetic unit for structure arithmetic |
| 02/03/1992 | CA2088577A1 Active storage means in a reduction processor |
| 02/03/1992 | CA2087023A1 Bit storage cell |
| 02/03/1992 | CA2087022A1 Arithmetic unit for structure arithmetic |
| 02/03/1992 | CA2086592A1 Method performing arithmetic, logical and related operations and a numerical arithmetic unit |
| 02/03/1992 | CA2086591A1 Reduction processor |
| 02/03/1992 | CA2086539A1 Associative memory |
| 02/01/1992 | CA2045276A1 System and method for emulating a window management environment having a uniform windowing interface |
| 01/29/1992 | EP0468837A2 Mask processing unit for high-performance processor |
| 01/29/1992 | EP0468836A1 Data input-output device for displaying information and method used |
| 01/29/1992 | EP0468831A2 Bus protocol for write-back cache processor |
| 01/29/1992 | EP0468820A2 Data processing system for single-precision and double-precision data |
| 01/29/1992 | EP0468754A2 Knowledge acquisition system |
| 01/29/1992 | EP0468728A2 Apparatus and method for production planning |
| 01/29/1992 | EP0468707A2 A computer system for operation with different system consoles |
| 01/29/1992 | EP0468625A2 Personal computer system with protected storage for interface and system utility programs |
| 01/29/1992 | EP0468542A2 Multiprocessor digital data processing system |
| 01/29/1992 | EP0468454A2 Interrupt controller |
| 01/29/1992 | EP0468229A2 A neural network with expert system functionality |
| 01/29/1992 | EP0468134A2 Subroutine return through branch history table |
| 01/29/1992 | EP0196331B1 Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system |
| 01/28/1992 | US5084814 Data processor with development support features |
| 01/28/1992 | US5084813 Rule based system for synthesizing a program suited for a target system in response to an input target system specification |
| 01/23/1992 | WO1992001265A2 Computer |
| 01/23/1992 | WO1992001254A1 Machine failure isolation using qualitative physics |
| 01/22/1992 | EP0467629A2 A loop compiler method & apparatus for a data processing system |
| 01/22/1992 | EP0467152A2 Microprocessor capable of decoding two instructions in parallel |
| 01/22/1992 | EP0466948A1 Communications system with a multi-processor system serving as the central control |
| 01/21/1992 | WO1992001990A1 System for high-level virtual computer with heterogeneous operating systems |
| 01/21/1992 | US5083267 Horizontal computer having register multiconnect for execution of an instruction loop with recurrance |
| 01/21/1992 | US5083265 Bulk-synchronous parallel computer |
| 01/21/1992 | US5083263 BISC with interconnected register ring and selectively operating portion of the ring as a conventional computer |
| 01/21/1992 | US5083262 Language bindings for graphics functions to enable one application program to be used in different processing environments |
| 01/21/1992 | US5083261 Dynamically alterable interrupt priority circuit |
| 01/21/1992 | CA2087735A1 System for high-level virtual computer with heterogeneous operating systems |
| 01/21/1992 | CA1294711C Communication interface protocol |
| 01/15/1992 | EP0466550A2 Conversion of internal processor register commands to I/O space address |
| 01/15/1992 | EP0466486A2 Distributed computing system |
| 01/15/1992 | EP0466339A2 A method of passing task messages in a data processing system |
| 01/15/1992 | EP0465959A2 Method for efficiently implementing read-type procedural attachments in a RETE-like pattern matching environment |
| 01/15/1992 | EP0465871A2 Shared data access serialization method and apparatus |
| 01/15/1992 | EP0161269B1 Output compare system and method automatically controlling multiple outputs in a data processor |
| 01/14/1992 | USRE33793 Apparatus and method for forming an enlarged underground arcuate bore and installing a conduit therein |
| 01/14/1992 | US5081702 Method and apparatus for processing more than one high speed signal through a single high speed input terminal of a microcontroller |
| 01/14/1992 | US5081601 System for combining independently clocked simulators |
| 01/14/1992 | US5081577 State controlled device driver for a real time computer control system |
| 01/14/1992 | US5081575 Highly parallel computer architecture employing crossbar switch with selectable pipeline delay |
| 01/14/1992 | US5081574 Branch control in a three phase pipelined signal processor |
| 01/14/1992 | US5081572 Manipulation of time-ordered lists and instructions therefor |
| 01/09/1992 | WO1991011766A3 Networked facilities management system |
| 01/08/1992 | EP0465328A2 Branch elimination in a reduced instruction set processor |
| 01/08/1992 | EP0465322A2 In-register data manipulation in reduced instruction set processor |
| 01/08/1992 | EP0465321A2 Ensuring data integrity in multiprocessor or pipelined processor system |
| 01/08/1992 | EP0465320A2 Combined queue for invalidates and return data in multi-processsor system |
| 01/08/1992 | EP0465179A2 Electronic copying/printing machines |
| 01/08/1992 | EP0465149A2 Data editing method and apparatus therefor |
| 01/08/1992 | EP0465054A1 Communications processor |
| 01/08/1992 | EP0465035A2 Transaction processing system and method |
| 01/08/1992 | EP0464988A2 Personal Computer system |
| 01/08/1992 | EP0464715A2 Interlock queueing |
| 01/08/1992 | EP0464632A2 Parallel data processing apparatus with signal skew compensation |
| 01/08/1992 | EP0464526A2 Architecture neutral distribution format (ANDF) installer using a compiler intermediate language |
| 01/08/1992 | EP0464525A2 Architecture neutral distribution format (ANDF) producer using a compiler intermediate language |
| 01/08/1992 | EP0464494A2 A high performance pipelined emulator |
| 01/08/1992 | EP0464433A2 Microcontroller device having remotely programmable EPROM & method of programming |
| 01/08/1992 | EP0464393A2 Signal processor |
| 01/08/1992 | EP0464283A2 Arrangement for reserving and allocating a plurality of competing demands for an ordered bus communications network |
| 01/08/1992 | EP0464028A1 Multiprocessor system. |
| 01/07/1992 | US5079718 Knowledge data management method and apparatus with cancel function |
| 01/07/1992 | US5079695 Object management facility which includes a snapshot facility for providing data transfer between two objects |
| 01/07/1992 | US5079694 Data processing apparatus having a working memory area |
| 01/02/1992 | EP0463978A2 Granularity hint for translation buffer in high performance processor |
| 01/02/1992 | EP0463977A2 Branching in a pipelined processor |
| 01/02/1992 | EP0463976A2 Data prefetch instruction in a reduced instruction set processor |
| 01/02/1992 | EP0463975A2 Byte-compare operation for high-performance processor |
| 01/02/1992 | EP0463973A2 Branch prediction in high performance processor |
| 01/02/1992 | EP0463967A2 Cache set selection for high-performance processor |
| 01/02/1992 | EP0463966A2 High-performance multi-processor having floating point unit |
| 01/02/1992 | EP0463965A2 Branch prediction unit for high-performance processor |
| 01/02/1992 | EP0463855A2 Microcomputer |
| 01/02/1992 | EP0463770A2 Computer with cache |