Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428) |
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06/02/1998 | US5761491 Data processing system and method for storing and restoring a stack pointer |
06/02/1998 | US5761490 Changing the meaning of a pre-decode bit in a cache memory depending on branch prediction mode |
06/02/1998 | US5761482 Emulation apparatus |
06/02/1998 | US5761479 Upgradeable/downgradeable central processing unit chip computer systems |
06/02/1998 | US5761476 Non-clocked early read for back-to-back scheduling of instructions |
06/02/1998 | US5761475 Computer processor having a register file with reduced read and/or write port bandwidth |
06/02/1998 | US5761474 Operand dependency tracking system and method for a processor that executes instructions out of order |
06/02/1998 | US5761473 Method and system for increased instruction synchronization efficiency in a superscalar processsor system utilizing partial data dependency interlocking |
06/02/1998 | US5761472 Interleaving block operations employing an instruction set capable of delaying block-store instructions related to outstanding block-load instructions in a computer system |
06/02/1998 | US5761470 Data processor having an instruction decoder and a plurality of executing units for performing a plurality of operations in parallel |
06/02/1998 | US5761469 Method and apparatus for optimizing signed and unsigned load processing in a pipelined processor |
06/02/1998 | US5761468 Computer apparatus |
06/02/1998 | US5761467 System for committing execution results when branch conditions coincide with predetermined commit conditions specified in the instruction field |
06/02/1998 | US5761466 Soft programmable single-cycle/pipelined micro-programmed control system |
06/02/1998 | US5761421 System and method for secure peer-to-peer communication between downloaded programs |
06/02/1998 | US5761413 In a digital data processing apparatus |
06/02/1998 | US5761412 Multi-processor system |
06/02/1998 | US5761407 Message based exception handler |
06/02/1998 | US5761389 In an information processing system |
06/02/1998 | US5761388 Fuzzy thesaurus generator |
06/02/1998 | US5761384 Fuzzy neural network system |
06/02/1998 | US5761380 Coordinating installation of distributed software components |
06/02/1998 | US5761199 Method of controlling an exchange, its control facilities, program modules, and switching system |
06/02/1998 | US5761105 Reservation station including addressable constant store for a floating point processing unit |
06/02/1998 | US5760789 Method for processing and prioritizing display of data from various sources |
06/02/1998 | US5760788 Graphical programming system and method for enabling a person to learn text-based programming |
06/02/1998 | US5760776 Menu editor for a graphical user interface |
06/02/1998 | US5760770 System and method for defining a view to display data |
06/02/1998 | US5760769 Apparatus and method for identifying a shared application program in a computer during teleconferencing |
06/02/1998 | US5760768 Method and system for customizing a user interface in a computer system |
06/02/1998 | US5760602 Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA |
06/02/1998 | US5760382 Apparatus for processing human-readable and machine-readable documents |
06/02/1998 | US5759102 Electronic gaming system |
05/29/1998 | CA2191640A1 User-interactive system and method for integrating applications |
05/28/1998 | WO1998023059A2 Remote upgrade of software over a network |
05/28/1998 | WO1998022908A1 Data navigator interface |
05/28/1998 | WO1998022893A1 Dynamic directory service |
05/28/1998 | WO1998022892A1 Structured data storage using globally addressable memory |
05/28/1998 | WO1998022891A1 Shared client-side web caching using globally addressable memory |
05/28/1998 | WO1998022890A1 System for tracking data |
05/28/1998 | WO1998022881A1 Remote access in a globally addressable storage environment |
05/28/1998 | WO1998022876A1 System and method for providing highly available data storage using globally addressable memory |
05/28/1998 | WO1998022874A1 Shared memory computer networks |
05/28/1998 | WO1998022873A1 Branch prediction mechanism employing branch selectors to select a branch prediction |
05/28/1998 | WO1998022872A1 Data processing circuit with a self-timed instruction execution unit |
05/28/1998 | WO1997034237A3 Split transaction snooping bus and method of arbitration |
05/27/1998 | EP0844565A2 Method and apparatus for protecting portions of memory |
05/27/1998 | EP0844559A2 Shared memory computer networks |
05/27/1998 | EP0844558A2 Object-oriented system, method and article of manufature for a client-server event driver message framework in an interprise computing framework system |
05/27/1998 | EP0844557A1 Compiling predicated code with direct analysis of the predicated code |
05/27/1998 | EP0844556A2 Software updating method |
05/27/1998 | EP0844555A2 Multifunctional object |
05/27/1998 | EP0844554A2 Information processing system and method |
05/27/1998 | EP0843850A1 System for dynamically caching and constructing software resource tables |
05/27/1998 | EP0843849A1 Method and apparatus for strong affinity multiprocessor scheduling |
05/27/1998 | EP0843848A2 Vliw processor which processes compressed instruction format |
05/27/1998 | CN1183164A Method and apparatus for reducing latency time on an interface by overlapping transmitted packets |
05/27/1998 | CN1183152A Apparatus for detecting and executing traps in a superscalar processor |
05/27/1998 | CN1183150A Method and apparatus for enhancing performance of a processor |
05/26/1998 | US5758351 System and method for the creation and use of surrogate information system objects |
05/26/1998 | US5758349 Process and system for run-time inheritance and disinheritance of methods and data |
05/26/1998 | US5758346 Converting representations of year |
05/26/1998 | US5758340 System and method for controlled, multi-tiered subsetting of a data model |
05/26/1998 | US5758336 Date format and date conversion procedure using a packed binary format |
05/26/1998 | US5758195 Register to memory data transfers with field extraction and zero/sign extension based upon size and mode data corresponding to employed address register |
05/26/1998 | US5758189 System for changing period to examine external storage unit for storage medium being loaded based on state of use of input device |
05/26/1998 | US5758186 Method and apparatus for generically handling diverse protocol method calls in a client/server computer system |
05/26/1998 | US5758184 System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads |
05/26/1998 | US5758183 Method of reducing the number of overhead instructions by modifying the program to locate instructions that access shared data stored at target addresses before program execution |
05/26/1998 | US5758179 Bus operation circuit using CMOS ratio logic circuits |
05/26/1998 | US5758178 Miss tracking system and method |
05/26/1998 | US5758176 Method and system for providing a single-instruction, multiple-data execution unit for performing single-instruction, multiple-data operations within a superscalar data processing system |
05/26/1998 | US5758174 Computer system having a plurality of stored system capability states from which to resume |
05/26/1998 | US5758169 Protocol for interrupt bus arbitration in a multi-processor system |
05/26/1998 | US5758168 Interrupt vectoring for optionally architected facilities in computer systems |
05/26/1998 | US5758165 Local area network and network operating system for formatting a client disk and installing a client operating system |
05/26/1998 | US5758164 Method and system for processing language |
05/26/1998 | US5758163 Method and apparatus for record fields usage checking at compile time |
05/26/1998 | US5758162 Program translating apparatus and a processor which achieve high-speed execution of subroutine branch instructions |
05/26/1998 | US5758161 Testing method for checking the completion of asynchronous distributed collective operations |
05/26/1998 | US5758160 Method and apparatus for building a software program using dependencies derived from software component interfaces |
05/26/1998 | US5758159 Structured software for a telecommunication system, including a communication service object which uses relationship data to route a message from an originator object to a recipient object |
05/26/1998 | US5758157 Method and system for providing service processor capability in a data processing by transmitting service processor requests between processing complexes |
05/26/1998 | US5758156 Method and apparatus of testing programs |
05/26/1998 | US5758155 Method for displaying progress during operating system startup and shutdown |
05/26/1998 | US5758154 Method and system for storing configuration data into a common registry |
05/26/1998 | US5758152 Method and apparatus for the generation and manipulation of data structures |
05/26/1998 | US5758143 Method for updating a branch history table in a processor which resolves multiple branches in a single cycle |
05/26/1998 | US5758142 Trainable apparatus for predicting instruction outcomes in pipelined processors |
05/26/1998 | US5758141 Method and system for selective support of non-architected instructions within a superscaler processor system utilizing a special access bit within a machine state register |
05/26/1998 | US5758140 Method and system for emulating instructions by performing an operation directly using special-purpose register contents |
05/26/1998 | US5758139 Control chains for controlling data flow in interlocked data path circuits |
05/26/1998 | US5758125 Method of sharing data in a heterogeneous computer system |
05/26/1998 | US5758124 Computer emulator |
05/26/1998 | US5758122 Immersive visual programming system |
05/26/1998 | US5758117 Method and system for efficiently utilizing rename buffers to reduce dispatch unit stalls in a superscalar processor |
05/26/1998 | US5758116 Instruction length decoder for generating output length indicia to identity boundaries between variable length instructions |
05/26/1998 | US5758115 Interoperability with multiple instruction sets |
05/26/1998 | US5758114 High speed instruction alignment unit for aligning variable byte-length instructions according to predecode information in a superscalar microprocessor |
05/26/1998 | US5758112 Pipeline processor with enhanced method and apparatus for restoring register-renaming information in the event of a branch misprediction |