Patents
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
06/1998
06/16/1998US5768585 System and method for synchronizing multiple processors during power-on self testing
06/16/1998US5768584 ROM chip enable encoding method and computer system employing the same
06/16/1998US5768582 Computer program product for domained incremental changes storage and retrieval
06/16/1998US5768576 Cable television system
06/16/1998US5768575 Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions
06/16/1998US5768574 Microprocessor using an instruction field to expand the condition flags and a computer system employing the microprocessor
06/16/1998US5768572 Timer state control optimized for frequent cancel and reset operations
06/16/1998US5768568 System and method for initializing an information processing system
06/16/1998US5768567 Optimizing hardware and software co-simulator
06/16/1998US5768566 Method and facility for uninstalling a computer program package
06/16/1998US5768564 Method and apparatus for translating source code from one high-level computer language to another
06/16/1998US5768563 System and method for ROM program development
06/16/1998US5768556 Method for use with a computer system
06/16/1998US5768555 Reorder buffer employing last in buffer and last in line bits
06/16/1998US5768554 Central processing unit
06/16/1998US5768553 Microprocessor using an instruction field to define DSP instructions
06/16/1998US5768541 System for hot-plugging peripheral device to computer bus and disconnecting peripheral device upon detecting predetermined sequence of keystrokes inputted by user through keyboard
06/16/1998US5768539 Downloading applications software through a broadcast channel
06/16/1998US5768538 Barrier synchronization method wherein members dynamic voting controls the number of synchronization phases of protocols and progression to each new phase
06/16/1998US5768520 Method for determining load capacity by grouping physical components into logical components whose loads represent fixed proportional loads of physical components
06/16/1998US5768516 Network management apparatus and control method thereof
06/16/1998US5768514 Cooperative activity system and method
06/16/1998US5768510 Object-oriented system, method and article of manufacture for a client-server application enabler system
06/16/1998US5768506 Method and apparatus for distributed workflow building blocks of process definition, initialization and execution
06/16/1998US5768500 Interrupt-based hardware support for profiling memory system performance
06/16/1998US5768483 Method of reporting result of execution of print job in network system, method of setting scanning conditions in network system, and network printing/scanning system
06/16/1998US5768480 Integrating rules into object-oriented programming systems
06/16/1998US5768475 Method and apparatus for automatically constructing a data flow architecture
06/16/1998US5768194 Semiconductor integrated circuit device on a semiconductor chip
06/16/1998US5768172 Graphic software functions without branch instructions
06/16/1998US5768160 Logical simulator with event load measuring and model recreating units for parallel processing elements
06/16/1998US5767867 In a computer system
06/16/1998US5767853 Computer operating method and computer operated thereby
06/16/1998US5767852 Priority selection on a graphical interface
06/16/1998US5767851 Method and apparatus for emulating an environment's drag and drop functionality in a host environment
06/16/1998US5767849 Computer system
06/11/1998WO1998025376A2 Method and apparatus for improved transaction processing in a distributed computing environment
06/11/1998WO1998025210A2 Computer interface for direct mapping of application data
06/11/1998WO1998025205A1 System and method for performing software patches in embedded systems
06/11/1998WO1998025203A1 Data processing system and method
06/11/1998WO1998025202A1 Cooperation of global and local register allocators for better handling of big procedures
06/11/1998WO1998025201A1 Method and apparatus for selecting a rounding mode for a numeric operation
06/11/1998WO1998025198A2 Interstitial content display using event-capture code running in web browser address space
06/11/1998WO1998025196A2 Dynamic branch prediction for branch instructions with multiple targets
06/11/1998WO1998025195A2 Computerized apparatus and methods for identifying usability problems of a computerized system
06/11/1998CA2309634A1 Interstitial content display using event-capture code running in web browser address space
06/11/1998CA2274257A1 Data processing system and method
06/10/1998EP0847009A2 Method and apparatus for automatically generating software programs
06/10/1998EP0847008A2 Device access and control using embedded web access functionality
06/10/1998EP0847007A2 An object oriented computer system
06/10/1998EP0847006A2 Temporal displacement icon in a graphical user interface
06/10/1998EP0847004A1 Information processing apparatus which accurately predicts whether a conditional branch is taken
06/10/1998EP0846297A1 System for distributed task execution
06/10/1998EP0846291A2 Processor with an instruction cache
06/10/1998EP0846288A1 Portable object-oriented operating system
06/10/1998EP0760129B1 Instruction creation device
06/10/1998DE19705467C1 Arrangement for generating freely programmable bit pattern sequence
06/10/1998DE19651075A1 Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen Unit for processing numerical and logical operations used in processors (CPUs), multiple computer systems, dataflow (DFP's), digital signal processors (DSP's) or the like
06/09/1998US5765221 Method and system of addressing which minimize memory utilized to store logical addresses by storing high order bits within a register
06/09/1998US5765220 Apparatus and method to reduce instruction address storage in a super-scaler processor
06/09/1998US5765218 Address generating circuit for generating addresses separated by a prescribed step value in circular addressing
06/09/1998US5765216 Data processor with an efficient bit move capability and method therefor
06/09/1998US5765215 Method and system for efficient rename buffer deallocation within a processor
06/09/1998US5765212 Memory control circuit that selectively performs address translation based on the value of a road start address
06/09/1998US5765208 Method of speculatively executing store instructions prior to performing snoop operations
06/09/1998US5765206 System and method for emulating a segmented virtual address space by a microprocessor that provides a non-segmented virtual address space
06/09/1998US5765205 Method and system for on-demand software distribution
06/09/1998US5765174 In a computer system
06/09/1998US5765167 Data file update processing apparatus
06/09/1998US5765157 Computer system and method for executing threads of execution with reduced run-time memory space requirements
06/09/1998US5765156 Data transfer with expanded clipboard formats
06/09/1998US5765154 Resource management system
06/09/1998US5765153 Information handling system, method, and article of manufacture including object system authorization and registration
06/09/1998US5765148 Database processing apparatus and database processing method for variable length objects, and computer-readable memory medium for storing database processing program
06/09/1998US5765145 Method for operating a computer system
06/09/1998US5765041 In an information handling system
06/09/1998US5765039 Method for providing object database independence in a program written using the C++ programming language
06/09/1998US5765037 System for executing instructions with delayed firing times
06/09/1998US5765035 Recorder buffer capable of detecting dependencies between accesses to a pair of caches
06/09/1998US5765026 In a data processing system
06/09/1998US5765025 Digital signal processor with on board program having arithmetic instructions and direct memory access instructions for controlling direct memory access thereof
06/09/1998US5765017 Method and system in a data processing system for efficient management of an indication of a status of each of multiple registers
06/09/1998US5765016 Reorder buffer configured to store both speculative and committed register states
06/09/1998US5765015 Slide network for an array processor
06/09/1998US5765014 Electronic computer system and processor element for processing in a data driven manner using reverse polish notation
06/09/1998US5765012 Controller for a SIMD/MIMD array having an instruction sequencer utilizing a canned routine library
06/09/1998US5765011 Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams
06/09/1998US5765009 Barrier synchronization system in parallel data processing
06/09/1998US5765007 Microinstruction sequencer having multiple control stores for loading different rank registers in parallel
06/09/1998US5765004 Suspend/resume capability for a protected mode microprocessor
06/09/1998US5765003 Interrupt controller optimized for power management in a computer system or subsystem
06/09/1998US5764999 Enhanced system management mode with nesting
06/09/1998US5764998 Method and system for implementing a distributed interrupt controller
06/09/1998US5764997 Computer system
06/09/1998US5764994 Method and system for compressing compiled microcode to be executed within a data processing system
06/09/1998US5764993 Data updating method using overlap area and program converting device for converting update program in distributed-memory parallel processor
06/09/1998US5764992 On a computer
06/09/1998US5764991 Processing object oriented code and virtual function code
06/09/1998US5764990 Compact encoding for storing integer multiplication Sequences
06/09/1998US5764989 Interactive software development system