Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
12/2014
12/09/2014US8909828 Electronic device and audio output method
12/09/2014US8909827 Method to allow a host to replace logical path resources it owns
12/09/2014US8909826 System and method for extending user-interface, and storage medium storing the same
12/09/2014US8909820 Data transmission methods and hub devices utilizing the same
12/09/2014US8908719 Clock rate controller and method thereof and electronic device thereof
12/04/2014US20140359231 System and Method for Efficient Buffer Management for Banked Shared Memory Designs
12/04/2014US20140359192 Apparatus including buffer allocation management and related methods
12/02/2014US8904223 Communication between domains of a processor operating on different clock signals
12/02/2014US8904069 Data processing apparatus and image processing apparatus
12/02/2014US8904064 Managing an out-of-order asynchronous heterogeneous remote direct memory access (RDMA) message queue
12/02/2014US8904060 First-in first-out memory device and electronic apparatus having the same
12/02/2014US8904052 Combined input port
11/2014
11/25/2014US8898566 Last screen rendering for electronic book readers
11/25/2014US8898503 Low latency data transfer between clock domains operated in various synchronization modes
11/25/2014US8898502 Clock domain crossing interface
11/25/2014US8898355 Diskless client using a hypervisor
11/25/2014US8898354 Methods and devices for synchronizing to a remotely generated time base
11/25/2014US8898353 System and method for supporting virtual host bus adaptor (VHBA) over infiniband (IB) using a single external memory interface
11/25/2014US8898347 Repeater device and control method
11/25/2014US8897388 Crest factor reduction (CFR) using asymmetrical pulses
11/20/2014US20140344489 Variable-sized buffers mapped to hardware registers
11/20/2014US20140344488 Virtual channel for data transfers between devices
11/18/2014US8892793 Techniques for oversampling a data stream in an integrated circuit
11/18/2014US8892791 Communications system for implementation of synchronous, multichannel, galvanically isolated instrumentation devices
11/18/2014US8892615 Arithmetic operation circuit and method of converting binary number
11/13/2014US20140337397 Generating a Signal
11/11/2014US8886854 Data transfer device and storage device
11/11/2014US8886844 Efficient scheduling of read and write transactions in dynamic memory controllers
11/11/2014US8886741 Receive queue models to reduce I/O cache consumption
11/11/2014US8885472 Scaling output-buffered switches
11/06/2014US20140330997 System and method for monitoring two-wire communication in a network environment
11/04/2014US8880928 Multirate transmission system and method for parallel input data
11/04/2014US8880912 Power supply device and image forming apparatus
11/04/2014US8880813 Method and device for multithread to access multiple copies
11/04/2014US8880761 Efficient low-latency buffer
11/04/2014US8880757 RDMA resource leakage detection and reporting
11/04/2014US8880745 Efficient scheduling of transactions from multiple masters
11/04/2014US8880741 Electronic systems and management methods
11/04/2014US8880287 Steering-wheel-hold detection for lane keeping assist feature
10/2014
10/30/2014US20140325125 Atomic write methods
10/30/2014US20140325098 High throughput hardware acceleration using pre-staging buffers
10/28/2014US8874814 Switch-state information aggregation
10/28/2014US8874813 Vehicle communication system
10/28/2014US8874811 System and method for providing a flexible buffer management interface in a distributed data grid
10/28/2014US8874809 Assembly and a method of receiving and storing data while saving bandwidth by controlling updating of fill levels of queues
10/28/2014US8874808 Hierarchical buffer system enabling precise data delivery through an asynchronous boundary
10/28/2014US8874806 Methods and apparatus for managing multipathing software
10/28/2014US8874805 Offloading input/output (I/O) completion operations
10/21/2014US8868961 Methods for acquiring hyper transport timing and devices thereof
10/21/2014US8868878 Disk array system and hard disk drive expansion method thereof
10/21/2014US8868827 FIFO apparatus for the boundary of clock trees and method thereof
10/21/2014US8868800 Accelerator buffer access
10/21/2014US8868799 Trace data transfer system having burst and minimum threshold inputs
10/14/2014US8862836 Multi-port register file with an input pipelined architecture with asynchronous reads and localized feedback
10/14/2014US8862835 Multi-port register file with an input pipelined architecture and asynchronous read data forwarding
10/14/2014US8862797 Reducing delay and delay variation in a buffer in network communications
10/14/2014US8862796 Lossy hit buffer
10/14/2014US8862795 Waveform accumulation and storage in alternating memory banks
10/09/2014US20140304467 Shiftable memory employing ring registers
10/07/2014US8856493 System of rotating data in a plurality of processing elements
10/07/2014US8856408 Reduced latency barrier transaction requests in interconnects
10/07/2014US8856402 Method and apparatus for multiplexing and demultiplexing data transmitted and received by using audio/video interface
10/07/2014US8856400 I/O performance quotas
10/07/2014US8856379 Intelligent network interface system and method for protocol processing
10/07/2014US8856057 Cognitive security system and method
10/02/2014WO2014160925A1 Active feedback interface for touch screen display
10/02/2014US20140297907 Data processing apparatus and data processing method
10/02/2014US20140297704 Parallel Device For Solving Linear Equation Set In Finite Field
10/01/2014EP2783277A1 Queuing apparatus
09/2014
09/30/2014US8850259 Systems and methods for precise generation of phase variation in digital signals
09/30/2014US8850136 Method and apparatus for coordinating transmission of data between a storage medium and a host
09/30/2014US8850089 Method and apparatus for unified final buffer with pointer-based and page-based scheme for traffic optimization
09/30/2014US8850088 Management system and management method
09/30/2014US8850082 Virtual USB compound device enumeration
09/30/2014US8848532 Method and system for processing data
09/25/2014US20140289299 System and Method for Statistical Process Control
09/23/2014US8843671 Dynamic resource allocation for serial attached SCSI devices
09/23/2014US8843661 Data transfer between wireless universal serial bus (USB) host controller driver and wireless USB host controller in a wireless USB host
09/18/2014WO2014138894A1 Systems and methods for controlling branch latency within computing applications
09/18/2014US20140281341 Multiple, per sensor configurable fifos in a single static random access memory (sram) structure
09/18/2014US20140281060 Low-contention update buffer queuing for large systems
09/18/2014US20140281059 Arithmetic processing apparatus and control method of arithmetic processing apparatus
09/18/2014US20140281058 Accelerator buffer access
09/18/2014US20140281057 Unified message-based communications
09/18/2014US20140280409 Data processing device, data processing method, and computer program
09/16/2014US8839018 Programmable mechanism for optimizing a synchronous data bus
09/16/2014US8838858 Managing command line interface commands
09/16/2014US8838853 Access buffer
09/16/2014US8838850 Cluster control protocol
09/16/2014US8838848 Systems and methods for intelligent system profile unique data management
09/16/2014US8837278 Concurrently applying an image file while it is being downloaded using a multicast protocol
09/13/2014CA2845279A1 Methods for compressing web page menus and devices thereof
09/09/2014US8832339 Full-duplex asynchronous communications using synchronous interfaces
09/09/2014US8832337 Interfacing circuit comprising FIFO storage in order to determine when to prevent multiple consecutive non-identical data based on difference threshold
09/09/2014US8832336 Reducing latency in serializer-deserializer links
09/09/2014US8832335 Control device and computer program product
09/09/2014US8832327 Loading different device drivers for one device
09/09/2014US8831133 Recursive digital pre-distortion (DPD)
09/04/2014US20140250252 First-in First-Out (FIFO) Modular Memory Structure
09/04/2014DE102014002898A1 Verzweigungszielpuffer mit einer effizienten Rückgabevorhersagefähigkeit Branch target buffer with an efficient return predictability
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