| Patents for G06F 15 - Digital computers in general; Data processing equipment in general (227,783) |
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| 05/28/1996 | US5522024 Programming environment system for customizing a program application based upon user input |
| 05/28/1996 | US5522015 Neural network and learning method for linearly unseparable patterns |
| 05/28/1996 | US5521823 Learning control vehicle |
| 05/28/1996 | CA2020385C Memory subsystem input queue |
| 05/23/1996 | WO1996015505A2 An online service development tool with fee setting capabilities |
| 05/23/1996 | WO1996015425A1 Analysis apparatus |
| 05/23/1996 | DE19531653A1 Single-chip microprocessor |
| 05/23/1996 | CA2204736A1 An online service development tool with fee setting capabilities |
| 05/22/1996 | EP0713343A2 Portable multi-information communication device |
| 05/22/1996 | EP0713187A2 Schedule-managing apparatus being capable of moving or copying a schedule of a date to another date |
| 05/22/1996 | EP0713171A1 Multi-media data communication system having a plurality of types of graphic user interface |
| 05/22/1996 | EP0664902B1 Load system |
| 05/22/1996 | EP0612422A4 Microcontroller with fuse-emulating latches. |
| 05/22/1996 | CN1031844C Microcomputer power failure control circuit |
| 05/21/1996 | US5519880 Parallel processing system and data transfer method which reduces bus contention by use of data relays having plurality of buffers |
| 05/21/1996 | US5519879 Integrated circuit having CPU and DSP for executing vector lattice propagation instruction and updating values of vector Z in a single instruction cycle |
| 05/21/1996 | US5519862 Concurrent processing apparatus with incremental command objects |
| 05/21/1996 | US5519813 Neuron unit for processing digital information |
| 05/21/1996 | US5519812 Ferrelectric adaptive-learning type product-sum operation circuit element and circuit using such element |
| 05/21/1996 | US5519811 Neural network, processor, and pattern recognition apparatus |
| 05/21/1996 | US5519805 Signal processing arrangements |
| 05/21/1996 | US5519694 Construction of hierarchical networks through extension |
| 05/21/1996 | US5519646 Calculator with display of processing for mulas as processing progresses |
| 05/17/1996 | WO1996014689A1 Pcmcia autoconfigure pc card |
| 05/17/1996 | WO1996014619A1 Hierarchical crossbar switch |
| 05/17/1996 | WO1996014617A1 Multicomputer system and method |
| 05/17/1996 | WO1996014616A1 Concurrent learning and performance information processing system |
| 05/17/1996 | WO1996014615A1 Micro personal digital assistant with integrated cpu interface to system memory |
| 05/15/1996 | EP0712076A2 System for distributed multiprocessor communication |
| 05/15/1996 | EP0712064A1 Variable frequency clock control for microprocessor-based computer systems |
| 05/15/1996 | EP0556254B1 Method of training a neural network |
| 05/15/1996 | EP0280020B1 Operator access to monitoring applications |
| 05/15/1996 | CN1122478A Study reaction information real-time testing and analyzing system and its real-time testing and analyzing method |
| 05/15/1996 | CN1122477A Graph display apparatus |
| 05/15/1996 | CN1031811C Neural network based automated cytological specimen classification system and method |
| 05/14/1996 | US5517669 Cyclic data communication system |
| 05/14/1996 | US5517667 Neural network that does not require repetitive training |
| 05/14/1996 | US5517666 Program controlled processor wherein vector distributor and vector coupler operate independently of sequencer |
| 05/14/1996 | US5517664 RISC system with instructions which include register area and displacement portions for accessing data stored in registers during processing |
| 05/14/1996 | US5517662 Multiprocessor system with distributed memory |
| 05/14/1996 | US5517661 Single-chip micro-computer having a plurality of operation modes |
| 05/14/1996 | US5517659 Multiplexed status and diagnostic pins in a microprocessor with on-chip caches |
| 05/14/1996 | US5517642 Inferencing production control computer system |
| 05/14/1996 | US5517625 System bus control system for multiprocessor system |
| 05/14/1996 | US5517619 Interconnection network and crossbar switch for the same |
| 05/14/1996 | US5517616 Multi-processor computer system with system monitoring by each processor and exchange of system status information between individual processors |
| 05/14/1996 | US5517600 Neuro-chip and neurocomputer having the chip |
| 05/14/1996 | US5517598 Error back-propagation method and neural network system |
| 05/14/1996 | US5517597 Convolutional expert neural system (ConExNS) |
| 05/14/1996 | US5517596 Learning machine synapse processor system apparatus |
| 05/14/1996 | US5517460 Semiconductor integrated circuit and IC card using the same |
| 05/14/1996 | US5517407 Device for including enhancing information with printed information and method for electronic searching thereof |
| 05/14/1996 | US5517193 For analysis and manipulation of data |
| 05/14/1996 | EP0722587A4 Learning neural network and methods thereof |
| 05/14/1996 | CA2052559C Vector processing device comprising a reduced amount of hardware |
| 05/09/1996 | WO1996013920A1 Method and apparatus for secure identification of a mobile user in a communication network |
| 05/09/1996 | WO1996013767A1 Multiprocessor device comprising a clock synchronization device |
| 05/08/1996 | EP0719432A4 Method and apparatus for configuring systems |
| 05/08/1996 | EP0710914A1 Smart programming of flash memory |
| 05/08/1996 | EP0710911A1 Arbitration device |
| 05/08/1996 | EP0710906A1 Reducing bus contention in shared memory |
| 05/08/1996 | EP0710386A1 System for secure telephone transactions |
| 05/08/1996 | EP0710385A1 Image compression coprocessor with data flow control and multiple processing units |
| 05/08/1996 | EP0710378A1 A method and apparatus for converting text into audible signals using a neural network |
| 05/08/1996 | EP0710376A1 Method for configuring multiple adapter cards on a bus |
| 05/08/1996 | CN1122026A Transposed memory for discrete cosine transform/converse discrete cosine transform circuit |
| 05/07/1996 | US5515524 Method and apparatus for configuring systems |
| 05/07/1996 | US5515516 Initialization mechanism for symmetric arbitration agents |
| 05/07/1996 | US5515477 Neural networks |
| 05/07/1996 | US5515304 Portable calculator for an array calculation |
| 05/07/1996 | US5515291 Apparatus for calculating delay time in logic functional blocks |
| 05/07/1996 | CA2051209C Consistency protocols for shared memory multiprocessors |
| 05/07/1996 | CA2040659C Digital signal processing device |
| 05/02/1996 | WO1996013008A1 Information conversion output method and portable information conversion apparatus |
| 05/02/1996 | WO1995024729A3 Modular architecture for high bandwidth computers |
| 05/02/1996 | DE4438698A1 Method of loading multi-computer systems |
| 05/02/1996 | DE4438697A1 Method for loading multi-computer systems |
| 05/02/1996 | DE19530842A1 Anpaßbare Benutzerschnittstelle Customizable user interface |
| 05/01/1996 | EP0710004A2 Image processing apparatus |
| 05/01/1996 | EP0709787A1 Data processing system comprising at least two processors |
| 05/01/1996 | EP0709783A1 Electronic key for remote mode switching of a data processing system |
| 05/01/1996 | EP0709760A2 Data copyright management system |
| 05/01/1996 | EP0708945A1 Method for analyzing cursive writing |
| 05/01/1996 | EP0708943A1 Method and apparatus for designing molecules with desired properties by evolving successive populations |
| 05/01/1996 | EP0591345B1 Method and system for monitoring a computer system |
| 05/01/1996 | CN1121758A Multimedia communications network |
| 04/30/1996 | US5513374 On-chip interface and DMA controller with interrupt functions for digital signal processor |
| 04/30/1996 | US5513371 Hierarchical interconnection network architecture for parallel processing, having interconnections between bit-addressible nodes based on address bit permutations |
| 04/30/1996 | US5513369 Star coupler device including means for connecting multiple star couplers together in a cascaded relationship |
| 04/30/1996 | US5513366 Method and system for dynamically reconfiguring a register file in a vector processor |
| 04/30/1996 | US5513324 Method and apparatus using network variables in a multi-node network |
| 04/30/1996 | US5513322 Multi-path message routing without deadlocks |
| 04/30/1996 | US5513321 Multiprocessor system discharging data in networking apparatus in response to off-line information from receiver-side processor |
| 04/30/1996 | US5513133 Compact microelectronic device for performing modular multiplication and exponentiation over large numbers |
| 04/30/1996 | US5512938 Teleconference terminal |
| 04/30/1996 | US5512853 Interface circuit adaptive to high speed and low voltage operation |
| 04/25/1996 | WO1996012391A1 Three-dimensional interconnect having modules with vertical top and bottom connectors |
| 04/25/1996 | WO1996012247A2 Segmenting foreground and background information employing a single layer recurrent neural network |
| 04/25/1996 | WO1996012235A1 System and method for processing of signal data and a communication system comprising a signal data processing system |
| 04/25/1996 | WO1996012234A1 System and method for processing of data and a communications system with such a system |