| Patents for G06F 15 - Digital computers in general; Data processing equipment in general (227,783) |
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| 02/06/1997 | WO1997004570A1 Controlling bandwidth allocation using a pace counter |
| 02/06/1997 | WO1997004569A1 Port and link identification |
| 02/06/1997 | WO1997004568A1 Asynchronous transfer mode based service consolidation switch |
| 02/06/1997 | WO1997004567A1 Method and apparatus for discarding frames in a communications device |
| 02/06/1997 | WO1997004566A1 Converting between an internal cell and multiple standard asynchronous transfer mode cells |
| 02/06/1997 | WO1997004565A1 Priority arbitration for point-to-point and multipoint transmission |
| 02/06/1997 | WO1997004564A1 Allocated and dynamic bandwidth management |
| 02/06/1997 | WO1997004563A1 Joint flow control mechanism in a telecommunications network |
| 02/06/1997 | WO1997004562A1 Point-to-multipoint arbitration |
| 02/06/1997 | WO1997004561A1 Link scheduling |
| 02/06/1997 | WO1997004560A1 Mapping a data cell in a communication switch |
| 02/06/1997 | WO1997004559A1 Switch fabric controller comparator system and method |
| 02/06/1997 | WO1997004558A1 Linked-list structures for multiple levels of control in an atm switch |
| 02/06/1997 | WO1997004557A1 Minimum guaranteed cell rate method and apparatus |
| 02/06/1997 | WO1997004556A1 Link buffer sharing method and apparatus |
| 02/06/1997 | WO1997004555A1 Method and apparatus for queuing data in a communications device |
| 02/06/1997 | WO1997004554A1 Method and system for controlling network service parameters in a cell based communications network |
| 02/06/1997 | WO1997004552A1 Point-to-multipoint transmission using subqueues |
| 02/06/1997 | WO1997004549A1 Hierarchical resource management |
| 02/06/1997 | WO1997004548A1 Redundant switch system and method of operation |
| 02/06/1997 | WO1997004546A1 Method and apparatus for reducing information loss in a communications network |
| 02/06/1997 | WO1997004544A1 Network switch utilizing centralized and partitioned memory for connection topology information storage |
| 02/06/1997 | WO1997004543A2 Allocated and dynamic switch flow control |
| 02/06/1997 | WO1997004542A2 Multipoint-to-point arbitration in a network switch |
| 02/06/1997 | WO1997004541A2 Multipoint to multipoint processing in a network switch having data buffering queues |
| 02/06/1997 | WO1997004408A1 A computer booking system |
| 02/06/1997 | WO1997004401A2 Multi-media processor architecture with high performance-density |
| 02/06/1997 | WO1997004399A2 Multiple level minimum logic network |
| 02/06/1997 | WO1997004398A2 Electronic book with multiple page displays |
| 02/06/1997 | WO1997004397A1 Serial control and data interconnect system using a crossbar switch and a multipoint topology |
| 02/06/1997 | WO1997004388A1 Partitionable array processor with independently running sub-arrays |
| 02/06/1997 | WO1997004387A1 Optimized synchronisation procedure |
| 02/06/1997 | WO1997004384A1 Dynamic load balancing |
| 02/06/1997 | WO1997003549A2 Prioritized access to shared buffers |
| 02/05/1997 | EP0757322A2 Calculation data display devices and methods |
| 02/05/1997 | EP0756730A1 Data storage |
| 02/05/1997 | EP0756726A1 Trainable user interface translator |
| 02/05/1997 | CN2246825Y 集成电路卡 IC card |
| 02/05/1997 | CN1142303A System for managing networked computer applications |
| 02/05/1997 | CN1142083A Implement for developing application of multi-function telephone set |
| 02/04/1997 | US5600846 Data processing system and method thereof |
| 02/04/1997 | US5600845 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor |
| 02/04/1997 | US5600843 Ring systolic array system for synchronously performing matrix/neuron computation using data transferred through cyclic shift register connected in cascade of trays |
| 02/04/1997 | US5600822 Resource allocation synchronization in a parallel processing system |
| 02/04/1997 | US5600811 Vector move instruction in a vector data processing system and method therefor |
| 02/04/1997 | US5600800 Personal computer system having a docking bay and a hand-held portable computer adapted to dock in the docking bay by a full-service parallel bus |
| 02/04/1997 | US5600791 Distributed device status in a clustered system environment |
| 02/04/1997 | US5600784 Fault resilient/fault tolerant computing |
| 02/04/1997 | US5600780 Programming environment system for customizing a program application based upon user input |
| 02/04/1997 | US5600758 Method and device for conducting a process in a controlled system with at least one precomputed process parameter. |
| 02/04/1997 | US5600753 Speech recognition by neural network adapted to reference pattern learning |
| 02/04/1997 | US5600674 Method and apparatus of an enhanced digital signal processor |
| 02/04/1997 | US5600582 Programmable horizontal line filter implemented with synchronous vector processor |
| 02/04/1997 | US5600272 Digital damping method and apparatus for phase-locked loops |
| 02/04/1997 | US5600263 Configuration modes for a time multiplexed programmable logic device |
| 01/30/1997 | WO1997003407A1 Method and system for correlating usage data in a distributed architecture |
| 01/30/1997 | CA2226251A1 Method and system for correlating usage data in a distributed architecture |
| 01/29/1997 | EP0756233A1 Data processing and operating system incorporating dynamic load-sharing in a network of linked processors |
| 01/29/1997 | EP0756232A1 Data processing and operating system incorporating dynamic binding across two or more processors |
| 01/29/1997 | EP0755545A1 Electronic account register |
| 01/29/1997 | EP0755543A1 Process for selecting elements for synthesis of a problem-solving unit consisting of several steps |
| 01/28/1997 | US5598574 Vector processing device |
| 01/28/1997 | US5598573 Multiple chip processor architecture with reset intercept circuit |
| 01/28/1997 | US5598571 Data processor for conditionally modifying extension bits in response to data processing instruction execution |
| 01/28/1997 | US5598570 Efficient data allocation management in multiprocessor computer system |
| 01/28/1997 | US5598568 Multicomputer memory access architecture |
| 01/28/1997 | US5598566 Networked facilities management system having a node configured with distributed load management software to manipulate loads controlled by other nodes |
| 01/28/1997 | US5598554 For a multiprocessor system |
| 01/28/1997 | US5598550 Cache controller for processing simultaneous cache accesses |
| 01/28/1997 | US5598547 Vector processor having functional unit paths of differing pipeline lengths |
| 01/28/1997 | US5598545 Circuitry and method for performing two operating instructions during a single clock in a processing device |
| 01/28/1997 | US5598534 Simultaneous verify local database and using wireless communication to verify remote database |
| 01/28/1997 | US5598529 Computer system resilient to a wide class of failures |
| 01/28/1997 | US5598408 Scalable processor to processor and processor to I/O interconnection network and method for parallel processing arrays |
| 01/28/1997 | US5598076 Process for optimizing control parameters for a system having an actual behavior depending on the control parameters |
| 01/23/1997 | WO1996038970A3 Portable computer and telecommunications equipment |
| 01/23/1997 | DE19530647C1 Input parameter preparation for neural network |
| 01/22/1997 | EP0755015A1 Combining data values |
| 01/22/1997 | EP0755014A1 Data transfer method in a multi-node dataprocessing system |
| 01/22/1997 | EP0755013A1 Method for transferring messages in a multinodal computer system |
| 01/22/1997 | EP0755005A1 Method for controlling automatic log-on function |
| 01/22/1997 | EP0755000A2 Microcomputer and address generation method |
| 01/22/1997 | EP0754998A1 An arithmetic unit |
| 01/22/1997 | EP0754323A1 Polymorphic network methods and apparatus |
| 01/22/1997 | EP0581828B1 Improvements in neural networks |
| 01/22/1997 | CN2245786Y Protection cover device for computer |
| 01/21/1997 | US5596765 Integrated processor including a device for multiplexing external pin signals |
| 01/21/1997 | US5596764 Debug mechanism for parallel-operating DSP module and CPU core |
| 01/21/1997 | US5596762 Small-size computer having pluggable memory unit for data protection |
| 01/21/1997 | US5596728 Method and apparatus for resolving resource conflicts after a portable computer has docked to an expansion base unit |
| 01/21/1997 | US5596698 Method and apparatus for recognizing handwritten inputs in a computerized teaching system |
| 01/21/1997 | US5596562 Controlling method and apparatus for supporting hard disk and/or CD-ROM drives through the PCMCIA interface |
| 01/15/1997 | EP0753812A2 Method and means for scheduling parallel processors |
| 01/15/1997 | EP0753699A2 Instrument tilt bail with stepped projections |
| 01/15/1997 | EP0753176A1 Improved method and apparatus for data access in multiprocessor digital data processing systems |
| 01/15/1997 | EP0753173A1 Processing system and method of operation |
| 01/15/1997 | EP0526504B1 Artificial neural device |
| 01/15/1997 | CN1140523A Multilingual operation and maintenance interface for telecommunication exchange |
| 01/14/1997 | US5594918 Parallel computer system providing multi-ported intelligent memory |
| 01/14/1997 | US5594916 Neural network processing system using semiconductor memories and processing paired data in parallel |