Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
01/2002
01/23/2002EP1018119B1 METHOD TO BE APPLIED WHEN EEPROMs ARE USED AS PROGRAMME MEMORIES
01/23/2002EP0835490B1 Write cache for write performance improvement
01/23/2002EP0756727B1 Method and device to control a memory
01/23/2002CN1332933A Copy protection system for home networks
01/23/2002CN1332877A Method and apparatus for supporting dynamic run-time object definition in a relational detabase management system
01/23/2002CN1332871A Cross-clock domain data transfer method apparatus
01/23/2002CN1332864A Method and apparatus for power management in memory subsystem
01/23/2002CN1332860A Electronic component and processing method for masking execution of instructions or data manipulation
01/23/2002CN1332549A 内容分配系统 Content distribution system
01/23/2002CN1332459A Semiconductor integrated circuit and its storage repairing method
01/23/2002CN1332457A Double-channel storage system and storage module of shared control and address bus
01/23/2002CN1332412A Access of printing material container
01/23/2002CN1332411A Page collector for improving performance of memory system
01/23/2002CN1078378C Semiconductor memory device having plurality of rwo address strobe signals
01/23/2002CN1078364C 存储器管理方法 The memory management method
01/22/2002US6341347 Thread switch logic in a multiple-thread processor
01/22/2002US6341345 Mixed-endian computer system that provides cross-endian data sharing
01/22/2002US6341342 Method and apparatus for zeroing a transfer buffer memory as a background task
01/22/2002US6341339 Apparatus and method for maintaining data coherence within a cluster of symmetric multiprocessors
01/22/2002US6341338 Protocol for coordinating the distribution of shared memory
01/22/2002US6341337 Apparatus and method for implementing a snoop bus protocol without snoop-in and snoop-out logic
01/22/2002US6341336 Cache coherency protocol having tagged state used with cross-bars
01/22/2002US6341335 Information processing system for read ahead buffer memory equipped with register and memory controller
01/22/2002US6341334 Bridge method, bus bridge, and multiprocessor system
01/22/2002US6341332 Disk array controller with connection path formed on connection request queue basis
01/22/2002US6341331 Method and system for managing a raid storage system with cache
01/22/2002US6341326 Method and apparatus for data capture using latches, delays, parallelism, and synchronization
01/22/2002US6341325 Method and apparatus for addressing main memory contents including a directory structure in a computer system
01/22/2002US6341293 Real-time computer “garbage collector”
01/22/2002US6341017 Interleaved-to-planar data conversion
01/22/2002CA2216795C Server-to-cache protocol for improved web performance
01/17/2002WO2002005285A2 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible
01/17/2002WO2002005225A1 Method for the initialisation of mobile data supports
01/17/2002WO2002005134A2 Methods and systems for a providing a highly scalable synchronous data cache
01/17/2002WO2002005096A1 Method to increase bandwidth of a cluster system
01/17/2002WO2002005082A2 Method and apparatus for enhancing backup operations in disk array storage devices
01/17/2002WO2001063240A3 Maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation
01/17/2002WO2001048582A3 Method and device for presenting data to a user
01/17/2002WO2001016750A3 High-availability, shared-memory cluster
01/17/2002WO2000073939A8 Method for combining table data
01/17/2002US20020007476 Storage
01/17/2002US20020007470 File server storage arrangement
01/17/2002US20020007460 Single sign-on system and single sign-on method for a web site and recording medium
01/17/2002US20020007455 Stateless mechanism for data retrieval
01/17/2002US20020007450 Line-oriented reorder buffer
01/17/2002US20020007445 Configuring vectors of logical storage units for data storage partitioning and sharing
01/17/2002US20020007444 Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency
01/17/2002US20020007443 Scalable multiprocessor system and cache coherence method
01/17/2002US20020007442 Cache coherency mechanism
01/17/2002US20020007441 Shared cache structure for temporal and non-temporal instructions
01/17/2002US20020007440 Cache access control system
01/17/2002US20020007439 System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system
01/17/2002US20020007438 Memory system for improving data input/output performance and method of caching data recovery information
01/17/2002US20020007437 Advanced technology attachment compatible disc drive write protection scheme
01/17/2002US20020007436 Semiconductor integrated circuit device and electronic system for executing data processing by using memory
01/17/2002US20020007433 Apparatus and method for data processing employing data blocks and updating blocks
01/17/2002US20020007430 Single-chip microcomputer
01/17/2002US20020007427 Recoverable methods and systems for processing input/output requests including virtual memory addresses
01/17/2002US20020007413 System and method for using a mapping between client addresses and addresses of caches to support content delivery
01/17/2002US20020007387 Dynamically variable idle time thread scheduling
01/17/2002US20020007375 Document management method and computer-readable storage medium storing program code for executing the same
01/17/2002US20020007366 Method of implicit partitioning the storage space available on a storage medium
01/17/2002US20020007365 Method of and an apparatus for displaying version information and configuration and a computer-readable recording medium on which a version and configuration information display program is recorded
01/17/2002US20020006065 Apparatus for analyzing failure for semiconductor memory device
01/17/2002US20020006060 Nonvolatile memory with illegitimate read preventing capability
01/17/2002DE10134495A1 Memory component and processing method for 3-D computer objects for use in 3-D graphics applications in which object depth data are rapidly changed by comparison of new external data with internal existing data
01/17/2002CA2352420A1 Memory management device for entering data blocks by substitution
01/16/2002EP1172957A1 Memory circuit, and synchronous detection circuit
01/16/2002EP1172822A1 Semiconductor device and control device for use therewith
01/16/2002EP1172739A2 Electronic book with embedded links to internal and external resources
01/16/2002EP1172731A2 Data processing apparatus and integrated circuit
01/16/2002EP1171989A2 Built-in manufacturer's certificates for a cable telephony adapter to provide device and service certification
01/16/2002EP1171835A2 Selecting a cache
01/16/2002EP1171826A2 Interactive electronic book
01/16/2002EP1171812A1 Method and system for controlling access to components of a multimedia scene
01/16/2002EP1171810A1 Manipulation-proof integrated circuit
01/16/2002CN1331873A Countermeasure method in electronic component using secret key cryptographic algorithm
01/16/2002CN1331817A Method and appts. for concurrent DBMS table operations
01/15/2002US6339819 Multiprocessor with each processor element accessing operands in loaded input buffer and forwarding results to FIFO output buffer
01/15/2002US6339817 Semiconductor memory including main and sub memory portions having plural memory cell groups and a bidirectional data transfer circuit
01/15/2002US6339816 Method for improving controllability in data processing system with address translation
01/15/2002US6339814 Storage and reproduction apparatus using a semiconductor memory
01/15/2002US6339813 Memory system for permitting simultaneous processor access to a cache line and sub-cache line sectors fill and writeback to a system memory
01/15/2002US6339812 Method and apparatus for handling invalidation requests to processors not present in a computer system
01/15/2002US6339800 Method for transmitting data between a microprocessor and an external memory module by using combined serial/parallel process
01/15/2002US6339783 Procedure execution device and procedure execution method
01/15/2002US6339779 Reference counting mechanism for garbage collectors
01/15/2002US6339778 Method and article for apparatus for performing automated reconcile control in a virtual tape system
01/15/2002US6339752 Processor emulation instruction counter virtual memory address translation
01/15/2002US6339726 Control apparatus for vending machine
01/15/2002US6339560 Semiconductor memory based on address transitions
01/15/2002US6339555 Semiconductor memory device enabling test of timing standard for strobe signal and data signal with ease, and subsidiary device and testing device thereof
01/15/2002CA2216346C Inter-cache protocol for improved web performance
01/15/2002CA2111237C Multiprocessor distributed initialization and self-test system
01/10/2002WO2002003654A1 Content providing method, content providing server, and client terminal in a content providing infrastructure
01/10/2002WO2002003387A2 Data storage system having point-to-point configuration
01/10/2002WO2002003338A1 Method and system for limiting the possibility of transforming data designed to constitute, in particular pre-payment tokens
01/10/2002WO2002003208A2 Method and apparatus for secure execution using a secure memory partition
01/10/2002WO2002003207A1 Data processing apparatus with a cache memory and method of using such an apparatus
01/10/2002WO2002003205A2 Method and apparatus for reducing heap size through adaptive object representation