| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 03/05/2002 | US6353888 Access rights authentication apparatus |
| 03/05/2002 | US6353879 Memory address translation in a data processing system |
| 03/05/2002 | US6353877 Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line write |
| 03/05/2002 | US6353876 Cache memory exchange optimized memory organization for a computer system |
| 03/05/2002 | US6353875 Upgrading of snooper cache state mechanism for system bus with read/castout (RCO) address transactions |
| 03/05/2002 | US6353874 Method and apparatus for controlling and caching memory read operations in a processing system |
| 03/05/2002 | US6353872 Memory interface circuit |
| 03/05/2002 | US6353871 Directory cache for indirectly addressed main memory |
| 03/05/2002 | US6353838 Incremental garbage collection |
| 03/05/2002 | US6353836 Method and apparatus for transferring data from the cache of one node to the cache of another node |
| 03/05/2002 | US6353834 Log based data architecture for a transactional message queuing system |
| 03/05/2002 | US6353829 Method and system for memory allocation in a multiprocessing environment |
| 03/05/2002 | US6353571 Memory system having flexible bus structure and method |
| 03/05/2002 | US6353569 Semiconductor memory device |
| 03/05/2002 | US6353452 Data item display method and device, and recording medium storing a program for controlling display of data item |
| 03/05/2002 | US6353438 Cache organization—direct mapped cache |
| 03/05/2002 | CA2267484C Reclaiming memory from deleted applications |
| 03/05/2002 | CA2252930C Accessing computer files |
| 02/28/2002 | WO2002017635A2 Transmitting and processing protected content in a conditional access system |
| 02/28/2002 | WO2002017597A1 Method and apparatus for handling communication requests at a server without context switching |
| 02/28/2002 | WO2002017330A2 Novel method and structure for reliable data copy operation for non-volatile memories |
| 02/28/2002 | WO2002017328A1 Low profile, high density memory system |
| 02/28/2002 | WO2002017327A2 Memory device having posted write per command |
| 02/28/2002 | WO2002017323A2 Synchronized write data on a high speed memory bus |
| 02/28/2002 | WO2002017169A1 Method of centrally brokering creative music works, system and recording medium |
| 02/28/2002 | WO2002017102A2 Method and apparatus for centralized snoop filtering |
| 02/28/2002 | WO2002017095A1 Control circuit for a dram memory |
| 02/28/2002 | WO2002017086A2 Method and apparatus for pipelining ordered input/output transactions in a cache coherent, multi-processor system |
| 02/28/2002 | WO2002017085A2 Memory garbage collection method and apparatus |
| 02/28/2002 | WO2002017084A2 Method and apparatus for invalidation of data in computer systems |
| 02/28/2002 | WO2002017081A1 Method and apparatus for combining architectures with logic option |
| 02/28/2002 | WO2002017079A2 Gathering enriched web server activity data of cached web content |
| 02/28/2002 | WO2002017070A2 Method and apparatus for atomic file look-up |
| 02/28/2002 | WO2002017056A2 Method and apparatus for copying data from one storage system to another storage system |
| 02/28/2002 | WO2001090898A3 Method for constituting and using an event database |
| 02/28/2002 | WO2001075896A3 Flash with consistent latency for read operations |
| 02/28/2002 | WO2001067273A3 Vliw computer processing architecture with on-chip dynamic ram |
| 02/28/2002 | US20020026639 Information processing system, information processing method, and recording medium |
| 02/28/2002 | US20020026607 Medium reading apparatus |
| 02/28/2002 | US20020026601 Information processing apparatus with central processing unit and main memory having power saving mode, and power saving controlling method |
| 02/28/2002 | US20020026597 Reducing leakage power consumption |
| 02/28/2002 | US20020026590 System for authenticating access to a network, storage medium, program and method for authenticating access to a network |
| 02/28/2002 | US20020026588 Dynamic resource control in a processing system |
| 02/28/2002 | US20020026581 Content distribution system, a content distribution method, an information processing apparatus, and a program providing medium |
| 02/28/2002 | US20020026580 System for access control to hidden storage area in a disk drive |
| 02/28/2002 | US20020026579 On-line directory assistance system |
| 02/28/2002 | US20020026571 Dual use master boot record |
| 02/28/2002 | US20020026567 Processor capable of enabling/disabling memory access |
| 02/28/2002 | US20020026566 Data backup in non-volatile memory |
| 02/28/2002 | US20020026565 A method and apparatus for controlling memory access by a plurality of devices |
| 02/28/2002 | US20020026564 Information processing method and information processing apparatus |
| 02/28/2002 | US20020026562 Two-way cache system and method of operation for interfacing with a peripheral device |
| 02/28/2002 | US20020026561 Cache management system |
| 02/28/2002 | US20020026560 Load balancing cooperating cache servers by shifting forwarded request |
| 02/28/2002 | US20020026558 Architecture for parallel distributed table driven I/O mapping |
| 02/28/2002 | US20020026557 Semiconductor circuit with address translation circuit that enables quick serial access in row or column directions |
| 02/28/2002 | US20020026555 Generation of chip-enable signal appropriate for employed chip configuration |
| 02/28/2002 | US20020026551 System for transferring data of reusing a plurality of data transferring area cyclically |
| 02/28/2002 | US20020026550 Information processing apparatus and method therefor |
| 02/28/2002 | US20020026540 Automatically configuring storage array including a plurality of media storage devices for storing and providing data within a network of devices |
| 02/28/2002 | US20020026518 Position information acquiring system and position information acquiring method |
| 02/28/2002 | US20020026511 System and method for controlling access to content carried in a caching architecture |
| 02/28/2002 | US20020026510 Information managing system, information managing apparatus, control method therefor and computer-readable memory |
| 02/28/2002 | US20020026497 System, apparatus, method, and program for constructing intranet site |
| 02/28/2002 | US20020026495 Method and apparatus allowing a limited client device to use the full resources of a networked server |
| 02/28/2002 | US20020026424 License issuing device/method and contents reproducing device/method |
| 02/28/2002 | US20020025608 Memory module, method of manufacturing the memory module, and test connector using the memory module |
| 02/28/2002 | US20020025039 Recording method, producing method, playback method, apparatus, and information recording medium |
| 02/28/2002 | US20020025003 Apparatus for processing a bit stream |
| 02/28/2002 | US20020024843 Non-volatile semiconductor memory device having a low defective rate |
| 02/28/2002 | US20020024524 Image processing apparatus, control method thereof, and image processing method |
| 02/28/2002 | US20020024453 Semiconductor device, terminal device and communication method |
| 02/28/2002 | US20020024088 Non-volatile semiconductor memory device |
| 02/28/2002 | US20020024062 Semiconductor integrated circuit |
| 02/28/2002 | DE10105505A1 Integrated circuit for testing DRAM, has judging circuit which detects normal condition of DRAM, when divided test data input for every predetermined number of bits correspond to excepted level |
| 02/28/2002 | DE10040267A1 Prozessor-Speicher-System Processor Memory System |
| 02/28/2002 | CA2420795A1 Transmitting and processing protected content |
| 02/27/2002 | EP1182874A1 Digital content protection system |
| 02/27/2002 | EP1182868A2 Improvements in file servers |
| 02/27/2002 | EP1182842A2 System and method for linking web sites |
| 02/27/2002 | EP1182667A2 System and method for secure high-temperature operation of a flash memory |
| 02/27/2002 | EP1182640A2 Memory access methods in a unified memory system |
| 02/27/2002 | EP1182571A2 TLB operations based on shared bit |
| 02/27/2002 | EP1182570A2 TLB with resource ID field |
| 02/27/2002 | EP1182569A1 TLB lock and unlock operation |
| 02/27/2002 | EP1182568A2 TLB operation based on task-id |
| 02/27/2002 | EP1182567A1 Software controlled cache configuration |
| 02/27/2002 | EP1182566A1 Cache operation based on range of addresses |
| 02/27/2002 | EP1182565A1 Cache and DMA with a global valid bit |
| 02/27/2002 | EP1182564A2 Local memory with indicator bits to support concurrent DMA and CPU access |
| 02/27/2002 | EP1182563A1 Cache with DMA and dirty bits |
| 02/27/2002 | EP1182562A1 Smartcache with interruptible block prefetch |
| 02/27/2002 | EP1182561A1 Cache with block prefetch and DMA |
| 02/27/2002 | EP1182560A2 Processor-memory system |
| 02/27/2002 | EP1182559A1 Improved microprocessor |
| 02/27/2002 | EP1182558A1 MME descriptor having big/little endian bit to control the transfer data between devices |
| 02/27/2002 | EP1182556A2 Task based adaptive profiling and debugging |
| 02/27/2002 | EP1182554A2 Partial migration of an object to another storage location in a computer system |
| 02/27/2002 | EP1182552A2 Dynamic hardware configuration for energy management systems using task attributes |
| 02/27/2002 | EP1182551A2 Address space priority arbitration |