Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
01/1988
01/12/1988US4719627 Memory system employing a low DC power gate array for error correction
01/12/1988US4719626 Diagnostic method and apparatus for channel control apparatus
01/12/1988US4719593 Apparatus for generating digital timing waveforms
01/12/1988US4719566 Method for entrapping unauthorized computer access
01/12/1988US4719410 Redundancy-secured semiconductor device
01/12/1988CA1231459A1 Scannerless message concentrator and communications multiplexer
01/12/1988CA1231456A1 Extended error correction for package error correction codes
01/12/1988CA1231447A1 Rule based diagnostic system with dynamic alteration capability
01/07/1988EP0251809A2 Error detection carried out by the use of unused modulo-m code
01/07/1988EP0251658A2 Digital adaptive voting
01/07/1988EP0251481A2 Microprocessor system debug tool apparatus
01/07/1988EP0250847A2 Managing log data in a transaction-oriented system
01/07/1988EP0250752A2 A high switching speed low power logic circuit
01/07/1988DE3621106A1 Method of ON LINE processing of equal input quantities using two processors
01/05/1988US4718065 In-line scan control apparatus for data processor testing
01/05/1988US4718064 Automatic test system
01/05/1988US4718002 Method for multiprocessor communications
12/1987
12/30/1987WO1987007992A1 Look ahead terminal counter
12/30/1987WO1987007968A2 Multi-mode counter network
12/30/1987WO1987007967A1 Adaptive control systems
12/29/1987US4716566 Error correcting system
12/23/1987DE3720165A1 Program checking arrangement for a memory module
12/22/1987US4715035 Method for the simulation of an error in a logic circuit and a circuit arrangement for implementation of the method
12/22/1987US4715034 Method of and system for fast functional testing of random access memories
12/22/1987US4714875 Printed circuit board fault location system
12/22/1987US4714839 Control circuit for disabling or enabling the provision of redundancy
12/22/1987CA1230683A1 Control circuit for autonomous counters of a plurality of cpu's or the like
12/17/1987WO1987007793A1 Method for realizing a fault-tolerant electronic system and a corresponding system
12/16/1987EP0249119A1 Simplified non-equivalence and equivalence gate circuit for use in active test aids of CMOS circuit arrangements
12/16/1987EP0249091A2 Parity spreading to enhance storage access
12/16/1987EP0249090A2 Database index journaling for enhanced recovery
12/16/1987EP0249061A2 Job interrupt at predetermined boundary for enhanced recovery
12/16/1987EP0248990A2 A sequence controller and method of an instruction processing unit for placing said unit in a ready, go, hold, or cancel state
12/16/1987EP0248875A1 Fault tolerant memory system
12/16/1987EP0248825A1 Signal selection by majority comparison
12/15/1987US4713816 Three module memory system constructed with symbol-wide memory chips and having an error protection feature, each symbol consisting of 2I+1 bits
12/15/1987US4713815 Automatic fault location system for electronic devices
12/15/1987US4713813 Logic analyzer
12/15/1987US4713811 Automatic mode switching unit for a serial communications data system
12/15/1987US4713793 Circuit for CCIS data transfer between a CPU and a plurality of terminal equipment controllers
12/15/1987US4713791 Real time usage meter for a processor system
12/15/1987US4713769 Method and apparatus for locating and displaying historical information within an electronic postage meter
12/15/1987US4713758 Computer testing arrangement
12/15/1987US4713757 Data management equipment for automatic flight control systems having plural digital processors
12/15/1987US4713656 Multi-programmed data processing system with facility for inspecting state of background program
12/15/1987US4713606 System for testing the failure or satisfactory operation of a circuit having logic components
12/15/1987US4713605 Linear feedback shift register for circuit design technology validation
12/09/1987EP0248269A2 Method of simulating a disruption fault in a logic FET circuit, and arrangments for carrying out said method
12/09/1987EP0248268A2 Logic circuit delay error simulation method, and arrangments for carrying out said method
12/08/1987US4712216 Method and device for correcting errors in memories
12/08/1987US4712215 CRC calculation machine for separate calculation of checkbits for the header packet and data packet
12/08/1987US4712213 Flip status line
12/08/1987US4712196 Data processing apparatus
12/03/1987WO1987007463A1 Method and apparatus for providing variable reliability in a telecommunication switching system
12/03/1987WO1987007459A1 Communication protocol for a network
12/03/1987WO1987007406A1 Data storage process
12/03/1987DE3617900A1 Processor module
12/02/1987EP0247809A2 Programmable logic device
12/02/1987EP0247605A2 System management apparatus for a multiprocessor system
12/02/1987CN87101839A Central control unit and working method for exchange system
12/02/1987CN87101838A Operating method of multiprocessor central control unit in high-efficiency fail-safe for exchange system
12/01/1987US4710935 Data transfer system
12/01/1987US4710934 Random access memory with error correction capability
12/01/1987US4710930 Method and apparatus for diagnosing a LSI chip
12/01/1987US4710928 Method and apparatus for detecting the uncontrollable operation of a control system
12/01/1987US4710927 Diagnostic circuit
12/01/1987US4710926 Fault recovery in a distributed processing system
12/01/1987US4710870 Central computer backup system utilizing localized data bases
11/1987
11/26/1987DE3616895A1 Verfahren zum abspeichern von daten A method for storing data
11/25/1987EP0247026A2 Method for synchronizing the time clocks of computing devices connected to a communication medium, and the computing devices concerned
11/25/1987EP0246905A2 Multi-stage apparatus with redundancy and method of processing data using the same
11/25/1987CN87103575A Microprocessor back-up system
11/24/1987US4709366 Computer assisted fault isolation in circuit board testing
11/24/1987US4709341 Self-monitoring system for detecting error at output port during cold start of microprocessor system
11/24/1987US4709340 Digital speech synthesizer
11/24/1987US4709325 Loosely coupled multiprocessor system capable of transferring a control signal set by the use of a common memory
11/24/1987US4709166 Complementary cascoded logic circuit
11/19/1987WO1987007055A1 Automated test apparatus for use with multiple equipment
11/19/1987WO1987007054A1 Universal programmable counter/timer and address register module
11/19/1987EP0246218A2 Fault-tolerant data processing system
11/19/1987EP0246079A2 Microprocessor back-up system
11/19/1987EP0245915A2 Logic signal state and timing display
11/19/1987EP0245882A2 Data processing system including dynamic random access memory controller with multiple independent control channels
11/19/1987EP0245591A2 Method and apparatus for transferring information into electronic systems
11/19/1987EP0245463A1 Built-in self-test system for vlsi circuit chips
11/19/1987EP0245296A1 Computer system with two processors
11/17/1987US4707833 Fault-compensating digital information transfer apparatus
11/17/1987US4707796 Reliability and maintainability indicator
11/17/1987CA1229418A1 Arrangement for a hardware matcher
11/17/1987CA1229416A1 Resetting system
11/17/1987CA1229384A1 Test circuit for differential cascode voltage switch
11/12/1987DE3615345A1 Electronic control computer with special configuration
11/11/1987EP0245152A1 Discrete Fourier transform calculator comprising an on-line testing device
11/11/1987EP0244926A2 Register and stack monitoring logic analyzer
11/11/1987EP0244532A2 Set-associative content addressable memory with a protection facility
11/11/1987EP0244443A1 Communication network for multiprocessor packet communication
11/11/1987EP0116544B1 Management of defects in storage media
11/11/1987EP0019515B1 Electronic postage meter having improved security and fault tolerance features
11/10/1987US4706250 Method and apparatus for correcting multibyte errors having improved two-level code structure
11/10/1987US4706249 Semiconductor memory device having error detection/correction function