Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
10/1988
10/26/1988EP0288043A2 Simulation method for programs
10/25/1988US4780875 Semiconductor memory with reduced size ECC circuit
10/25/1988US4780874 Diagnostic apparatus for a data processing system
10/25/1988US4780842 Cellular processor apparatus capable of performing floating point arithmetic operations
10/25/1988US4780819 Emulator system utilizing a program counter and a latch coupled to an emulator memory for reducing fletch line of instructions stored in the emulator memory
10/25/1988US4780809 Apparatus for storing data with deferred uncorrectable error reporting
10/25/1988US4780666 Semiconductor integrated circuit device having rest function
10/25/1988US4780628 Testing programmable logic arrays
10/25/1988US4780602 IC card
10/20/1988WO1988008233A1 Data transmission method
10/20/1988WO1988008167A1 Parallel networking architecture
10/20/1988WO1988008161A1 An operations controller for a fault tolerant multiple node processing system
10/20/1988WO1988008138A1 Identity insert for electronic modules
10/19/1988EP0287539A1 Stored program controlled real time system including three substantially identical processors
10/19/1988EP0287334A2 High availability cache memory
10/19/1988EP0287302A2 Cross-coupled checking circuit
10/19/1988EP0287301A2 Input/output system for multiprocessors
10/19/1988EP0286988A2 Method and apparatus for testing missile systems
10/19/1988EP0286879A1 Integrated-circuit arrangement for controlling an integrated oscillator
10/19/1988EP0286856A1 Fault-tolerant computer arrangement
10/19/1988EP0286744A1 Detection of digital signal error rates
10/19/1988EP0286648A1 System for diagnosing anomalies or breakdowns in a plurality of types of electronic control systems installed in motor vehicles.
10/18/1988US4779271 Forced error generating circuit for a data processing unit
10/18/1988US4779221 Timing signal generator
10/18/1988US4779008 Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system
10/18/1988CA1243353A1 Data capture logic for vlsi chips
10/12/1988EP0286361A2 Method of verifying computer software
10/12/1988EP0285955A1 Device to connect non-volatile memories in an electronic machine, and postage meter using it
10/11/1988US4777619 Method of assuring a proper computer subsystem configuration
10/11/1988US4777616 Increased resolution logic analyzer using asynchronous sampling
10/11/1988US4777355 IC card and system for checking the functionality thereof
10/11/1988CA1243126A1 Method and apparatus for continuous after-imaging
10/11/1988CA1243098A1 Distributed control with mutual spare switch over capability
10/06/1988DE3709524A1 Method of testing the memory cell contents of a program memory
10/05/1988EP0285067A1 Non-volatile memory with a limited writing rate and its use in postage meters
10/05/1988EP0284606A1 Device for resetting computer equipment.
10/05/1988CN88100759A Memory re-mapping in microcomputer system
10/04/1988US4775979 Error correction system
10/04/1988US4775978 Data error correction system
10/04/1988US4775976 Method and apparatus for backing up data transmission system
10/04/1988US4775957 Microcomputer with abnormality sensing function
10/04/1988US4775930 Microprocessor system
10/04/1988CA1242814A1 Self diagnostic cyclic analysis testing system (cats) for lsi/vlsi
10/04/1988CA1242805A1 Rule acquisition for expert systems
09/1988
09/29/1988DE3708506A1 Method of fault location in digital circuits with a bus structure
09/28/1988EP0284199A2 Gate processor arrangement for simulation processor system
09/28/1988EP0284111A1 Method, system and test-driver computer for testing a computer and/or associated software
09/28/1988EP0283610A1 Improvements in or relating to the testing of electronic equipment
09/28/1988EP0283564A2 Memory re-mapping in a microcomputer system
09/28/1988CN88100520A Smart sensor system for diagnostic monitoring
09/27/1988US4774712 Redundant storage device having address determined by parity of lower address bits
09/27/1988US4774709 Symmetrization for redundant channels
09/27/1988US4774681 Method and apparatus for providing a histogram
09/27/1988US4774669 Train control having a supervisory monitor providing improved operating safety and better maintenance support
09/27/1988US4774660 Increased bandwidth for multi-processor access of a common resource
09/27/1988US4774625 Multiprocessor system with daisy-chained processor selection
09/27/1988US4774493 Method and apparatus for transferring information into electronic systems
09/27/1988CA1242486A1 Automatic test equipment
09/22/1988WO1988007311A1 Error correction of digital image data by means of image redundancy
09/22/1988WO1988007237A1 High-speed floating point arithmetic unit
09/22/1988WO1988006760A3 Central processor unit for digital data processing system including write buffer management mechanism
09/21/1988EP0283196A2 In-place diagnosable electronic circuit board
09/21/1988EP0283193A2 Method of spare capacity use for fault detection in a multiprocessor system
09/21/1988EP0282877A1 Method and apparatus for controlling the error correction in a data transmission system of data read from dynamical peripheral storage devices, in particular disk storage devices of a data-processing system
09/21/1988EP0282788A1 Method for monitoring of error-free performance of control and connection operations in a circuit arrangement for telecommunication exchanges, especially telephone exchanges
09/21/1988EP0282628A2 Dual path bus structure for computer interconnection
09/21/1988EP0096030B1 Apparatus for high speed fault mapping of large memories
09/20/1988US4773072 Method and circuit configuration for suppressing short-time interferences
09/20/1988US4773067 Multi-node data processing system
09/20/1988US4773028 Method and apparatus for improved monitoring and detection of improper device operation
09/20/1988US4773003 Apparatus for monitoring and analyzing large data blocks on a computer channel
09/20/1988CA1242276A1 Programmable word length and self-testing memory in a gate array with bidirectional symmetry
09/14/1988EP0282039A2 Apparatus and method for diagnosing functions of a data processor
09/14/1988EP0281999A2 Data processing system with pluggable option card
09/14/1988EP0281890A2 Security circuit device with a plurality of microcomputers processing the same data
09/14/1988EP0281740A2 Memories and the testing thereof
09/14/1988EP0281552A1 Integrated circuits
09/14/1988EP0136203B1 Apparatus for dynamically controlling the timing of signals in automatic test systems
09/13/1988US4771427 Equalization in redundant channels
09/13/1988US4771378 Electrical interface system
09/07/1988WO1988006760A2 Central processor unit for digital data processing system including write buffer management mechanism
09/07/1988EP0280890A2 System and method for detecting the execution of an instruction in a central processing unit
09/07/1988EP0280848A2 On-chip on-line ac and dc clock tree error detection system
09/07/1988EP0280773A2 Method for recovery enhancement in a transaction-oriented data processing system
09/06/1988US4769761 Apparatus and method for isolating and predicting errors in a local area network
09/06/1988US4769644 Cellular automata devices
09/06/1988CA1241778A1 Analog signal processing circuit
09/06/1988CA1241765A1 Distributed information backup system
09/06/1988CA1241758A1 Multiprocessor computer system which includes n parallel-operating computer modules and an external apparatus, and computer module for use in such a system
09/06/1988CA1241717A1 Distributed microprocessor based sensor signal processing system for a complex process
08/1988
08/31/1988EP0280258A2 Fault-tolerant digital timing apparatus
08/31/1988EP0280035A2 Method for the programme securing and for integrity checking of a secured programme
08/31/1988EP0280020A2 Operator access to monitoring applications
08/31/1988EP0280013A1 Device for verifying proper operation of a checking code generator
08/31/1988EP0279912A2 Multiple copy data mechanism on synchronous disk drives
08/31/1988EP0279831A1 Device for the fail-safe transmission, in a reliable manner as regards signalling techniques, of serial data between fail-safe computers operating preferably on two channels by means of a twin-loop bus system.
08/30/1988US4768197 Cache error code update
08/30/1988US4768196 Programmable logic array
08/30/1988US4768194 Integrated semiconductor memory
08/30/1988US4768193 Semiconductor memory device having error correction function and incorporating redundancy configuration