Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
08/1990
08/21/1990US4951220 Method and apparatus for manufacturing a test-compatible, largely defect-tolerant configuration of redundantly implemented, systolic VLSI systems
08/21/1990US4951210 Protective apparatus of vehicle microcomputer
08/21/1990US4951171 Power supply monitoring circuitry for computer system
08/21/1990US4951069 Minimization of communication failure impacts
08/21/1990US4951037 Display segment fault detection apparatus
08/21/1990CA1273126A1 Instruction for implementing a secure computer system
08/21/1990CA1273117A1 Method and apparatus for implementing a bus protocol
08/21/1990CA1273116A1 Method of distributed file recovery and a system using the method
08/21/1990CA1273076A1 Flexible duplex dual port serial link controller
08/21/1990CA1273062A1 Programmable logic array
08/16/1990EP0382453A2 Circuit arrangement for verifying data stored in a random access memory
08/16/1990EP0382390A2 Method and means for error checking of dram-control signals between system modules
08/16/1990EP0382360A2 Event qualified testing architecture for integrated circuits
08/16/1990EP0382234A2 Microprocessor having improved functional redundancy monitor mode arrangement
08/16/1990EP0382184A2 Circuit for testability
08/16/1990EP0381885A2 Method for identifying bad data
08/16/1990EP0381679A1 Electronic assembly with self-test circuit
08/16/1990EP0381667A1 Programmable, asynchronous logic cell and array
08/16/1990CA2010134A1 Very high speed error detection network
08/14/1990US4949343 Error detecting circuit for a decoder
08/14/1990US4949340 Redundant repeater
08/14/1990US4949273 Vital processing system including a vital power controller with forgiveness feature
08/14/1990US4949252 Computer channel analyzer with monitoring and selective display of predetermining events and related data
08/14/1990US4949251 Exactly-once semantics in a TP queuing system
08/14/1990US4949246 Adapter for transmission of data words of different lengths
08/14/1990US4949052 Clock signal generator having back-up oscillator substitution
08/14/1990US4948138 Device for maintaining game state audit trail upon instantaneous power failure
08/14/1990CA1272808A1 Electronic apparatus with memory for recording individual information
08/08/1990EP0381644A2 Multi-processor system and method for maintaining the reliability of shared data structures
08/08/1990EP0381470A2 Processing of memory access exceptions along with prefetched instructions within the instruction pipeline of a virtual memory system-based digital computer
08/08/1990EP0381405A1 Semiconductor memory device having mask rom structure
08/08/1990EP0381334A2 Apparatus for management, comparison, and correction of redundant digital data
08/08/1990EP0381332A2 Improvements in or relating to the simulation of circuits having analogue parts and digital parts
08/08/1990EP0381140A2 Data processing apparatus
08/08/1990EP0380889A1 Method and device to do away with disturbances generated by power commutators
08/08/1990EP0380858A2 Method and apparatus for detecting and correcting errors in a pipelined computer system
08/08/1990EP0380853A2 Write back buffer with error correcting capabilities
08/08/1990EP0380509A1 Measuring process and device for the analysis of disturbances in digital buses.
08/08/1990EP0221119B1 A process for monitoring a data processing unit and a system for performing the process
08/08/1990EP0125633B1 Testing apparatus for redundant memory
08/08/1990CA2009477A1 Parallel microprocessor architecture
08/07/1990US4947397 Job scheduler diagnostics
08/07/1990US4947396 Method and system for detecting data error
08/07/1990US4947395 Bus executed scan testing method and apparatus
08/07/1990US4947393 Activity verification system for memory or logic
08/07/1990CA1272509A1 Diagnostic system for a digital processor
08/02/1990DE3902849A1 Circuit arrangement for exchange of data between two microcomputers
08/02/1990DE3902767A1 Method and arrangement for identification of software which is stored in a microcomputer of a sensor
08/02/1990CA2008868A1 Initiazation of a main storage
08/01/1990EP0380161A1 Method of testing a circuit, and circuit suitable for such a method
08/01/1990EP0380093A2 Data transfer controller using dummy signals for continued operation under insignificant faulty conditions
08/01/1990EP0379896A2 Online performance monitoring and fault diagnosis technique for direct current motors as used in printer mechanisms
08/01/1990EP0379829A2 Method of providing non-disruptive recovery in a communication system
08/01/1990EP0379770A2 Address transfer error detection process
08/01/1990EP0379768A2 Read-modify-write operation
08/01/1990EP0379625A1 Method for the treatment of parity-controllable binary code words which undergo a digital damping and/or code conversion during their transmission
07/1990
07/31/1990US4945540 Gate circuit for bus signal lines
07/31/1990US4945537 Maximum length linearly occurring code sequence generator
07/31/1990US4945536 Method and apparatus for testing digital systems
07/31/1990US4945535 Information processing unit
07/31/1990US4945512 High-speed partitioned set associative cache memory
07/31/1990US4945503 Hardware simulator capable of reducing an amount of information
07/31/1990US4945474 Method for restoring a database after I/O error employing write-ahead logging protocols
07/31/1990US4945471 Message transmission system for selectively transmitting one of two colliding messages based on contents thereof
07/31/1990CA2008522A1 Read/write head buffer
07/31/1990CA1272298A1 Console unit for clustered digital data processing system
07/31/1990CA1272297A1 Self-testing peripheral-controller system
07/31/1990CA1272292A1 Fail safe architecture for a computer system
07/31/1990CA1272289A1 Signature verification system
07/31/1990CA1272260A1 Data monitor apparatus
07/25/1990EP0379350A2 Digital data bus loading monitors
07/25/1990EP0379155A2 Large scale integration circuit device
07/25/1990EP0378538A1 Arrangement and process for detecting and localizing faulty circuits in a storage component.
07/25/1990EP0221109B1 Computer testing arrangement and method therefor
07/25/1990EP0100821B1 Method and apparatus for managing a database
07/24/1990US4943969 Isolation for failures of input signals supplied to dual modules which are checked by comparison
07/24/1990US4943968 Method of displaying execution trace in a logic programming language processing system
07/24/1990US4943967 Semiconductor memory with an improved dummy cell arrangement and with a built-in error correction code circuit
07/24/1990US4943966 For allocating memory address base addresses among memory units
07/24/1990US4943965 Digital signal decoding method and circuit therefor
07/24/1990US4943946 Control system for chained circuit modules
07/18/1990EP0378424A1 Link transmission priority start
07/18/1990EP0378377A2 Expert system for surveillance, diagnosis and prognosis of plant operation
07/18/1990EP0378242A2 Integrated circuit with a debug environment
07/18/1990EP0377684A1 Point of sale system
07/18/1990CN1008848B Measuring melthod for effective address of mass storage
07/18/1990CN1008840B Microprocessor back-up system
07/17/1990US4942615 Gate processor arrangement for simulation processor system
07/17/1990US4942579 High-speed, high-capacity, fault-tolerant error-correcting storage system
07/17/1990US4942578 Buffer control method and apparatus
07/17/1990US4942577 Logic circuit system with latch circuits for reliable scan-path testing
07/17/1990US4942576 Badbit counter for memory testing
07/17/1990US4942575 Error connection device for parity protected memory systems
07/17/1990US4942524 Software trap system which saves previous content of software trap handling pointer in a stack upon execution of a trap
07/17/1990US4942523 Method for recovery from synchronization loss in a queued data transfer
07/17/1990US4942358 Integrated circuit option identification circuit and method
07/12/1990WO1990007827A1 Distributed switching architecture for communication module redundancy
07/11/1990EP0377455A2 Test mode switching system for LSI
07/11/1990EP0377368A1 Data-processing device having a non-volatile electrically erasable and reprogrammable memory
07/11/1990EP0377164A2 LRU error detection using the collection of read and written LRU bits