Patents
Patents for G06F 11 - Error detection; Error correction; Monitoring (140,345)
09/1991
09/03/1991CA2076537A1 Data corrections applicable to redundant arrays of independent disks
09/03/1991CA1288524C Multiprocessor interrupt rerouting mechanism
09/03/1991CA1288522C Method and apparatus for determining available memory size
09/03/1991CA1288519C Viterbi decoder with reduced number of data move operations
09/03/1991CA1288515C Automated test apparatus for use with multiple equipment
09/03/1991CA1288478C Scan data path coupling
08/1991
08/29/1991DE4025640A1 Semiconductor EEPROM with matrix of memory cells - has first writing word line, and second one coupled to different memory cell
08/29/1991CA2033566A1 Voice password controlled computer security system
08/28/1991EP0443975A2 Method for memory management within a document history log in a data processing system
08/28/1991EP0443974A2 Method for maintaining a selective document history log in a data processing system
08/28/1991EP0443973A2 Method for maintaining an alterable document history log in a data processing system
08/28/1991EP0443972A2 Method for maintaining a time frame selective document history log in a data processing system
08/28/1991EP0443971A2 Method for automatic generation of document history log exception reports in a data processing system
08/28/1991EP0443824A2 Transaction management protocol for a multi-processors computer
08/28/1991EP0443753A1 Method and apparatus for producing order independent signatures for error detection
08/28/1991EP0443597A1 Operations control apparatus
08/28/1991EP0443556A2 Method and apparatus for partially running a sequence program for debugging thereof
08/28/1991EP0443377A2 Arrangement for the fail-safe displaying, in a reliable manner as regards to signalling techniques, of a signalling picture
08/28/1991EP0443302A2 Automatic delay adjustment for static timing analysis
08/28/1991EP0443212A1 A method for executing computer-assisted physical fault diagnosis by means of an expert system
08/28/1991EP0443081A2 Method for operating a linear feedback shift register as a serial shift register with a crosscheck grid
08/28/1991EP0318547A4 Real-time bch error correction code decoding mechanism
08/28/1991CN1013715B Division operation apparatus for galors field elements
08/27/1991US5043990 Semiconductor integrated circuit device
08/27/1991US5043988 Method and apparatus for high precision weighted random pattern generation
08/27/1991US5043984 Method and system for inspecting microprocessor-based unit and/or component thereof
08/27/1991US5043943 Cache memory with a parity write control circuit
08/27/1991US5043931 Wrap test system and method
08/27/1991US5043927 Digital signal quality analysis using simultaneous dual-threshold data acquisition
08/27/1991US5043871 Method and apparatus for database update/recovery
08/27/1991US5043866 Soft checkpointing system using log sequence numbers derived from stored data pages and log records for database recovery
08/27/1991CA1288147C Fault tolerant control for a refrigerator
08/22/1991DE4005321A1 Fault tolerant computer system - has working memories in redundant computers divided into high-cost, fail-safe regions and low-cost regions for active and inactive data
08/22/1991CA2036013A1 Apparatus for the fail-safe display of an indicating diagram
08/21/1991EP0442809A2 Model-based reasoning system for network fault diagnosis
08/21/1991EP0442651A2 Apparatus and method for background memory test during system start up
08/21/1991EP0442616A2 Method for testing a computer memory location
08/21/1991EP0442531A2 Array disk apparatus
08/21/1991EP0442301A2 Dynamic RAM with on-chip ECC and optimized bit and word redundancy
08/21/1991EP0442277A2 A logic simulation using a hardware accelerator together with an automated error event isolation and trace facility
08/21/1991EP0441910A1 Monolithic accelerometer with flexurally mounted force transducer.
08/21/1991EP0441872A1 Methods and apparatus for monitoring and diagnosing system performance
08/21/1991EP0204130B1 Apparatus for reducing test data storage requirements for high speed vlsi circuit testing
08/21/1991CN1013620B Multiprocessor system with fault locator
08/20/1991US5042035 Method and apparatus for controlling fault-state displaying of a subscriber's card in switching system
08/20/1991US5042034 By-pass boundary scan design
08/20/1991CA2015594A1 Fail-safe method for updating system information stored in a memory
08/14/1991WO1991012577A1 Disk drive memory
08/14/1991EP0441714A1 Device for monitoring the operation of a microprocessor system or the like
08/14/1991EP0441641A2 An automatic plant state diagnosis system including a display selection system for selecting displays responsive to the diagnosis
08/14/1991EP0441518A2 Built-in self-test technique for read-only memories
08/14/1991EP0441090A2 Computer controlled optimized pairing of disk units
08/14/1991EP0441087A1 Checkpointing mechanism for fault-tolerant systems
08/14/1991CA2075934A1 Disk drive memory
08/13/1991US5040180 Method and device for securing data
08/13/1991US5040178 Method of fault protection for a microcomputer system
08/13/1991US5040118 Apparatus and method employing multiple crash evaluation algorithms and evaluation expertise for actuating a restraint system in a passenger vehicle
08/13/1991US5040111 Personal computer based non-interactive monitoring of communication links
08/13/1991US5040108 Information processing system having microprogram-controlled type arithmetic processing unit with clock synchronization instruction
08/07/1991EP0440312A2 Fault tolerant data processing system
08/07/1991EP0440080A2 Fault-tolerant shiftregister based on neuronal networks
08/07/1991EP0439988A2 Computer monitoring of installed options
08/07/1991EP0439693A2 Multiprocessing packet switching connection system having provision for error correction and recovery
08/07/1991EP0439533A1 Object-oriented, logic, and database programming tool
08/07/1991CN1053695A Computer controlled optimized pairing of disk units
08/06/1991US5038386 Polymorphic mesh network image processing system
08/06/1991US5038368 Redundancy control circuit employed with various digital logic systems including shift registers
08/06/1991US5038349 Method for reducing masking of errors when using a grid-based, "cross-check" test structure
08/06/1991US5038348 Apparatus for debugging a data flow program
08/06/1991US5038320 Computer system with automatic initialization of pluggable option cards
08/06/1991US5038319 System for recording and remotely accessing operating data in a reproduction machine
08/06/1991US5038317 Programmable controller module rack with a relative rack slot addressing mechanism
08/06/1991US5038307 Measurement of performance of an extended finite state machine
07/1991
07/31/1991WO1991011766A2 Networked facilities management system
07/31/1991EP0439343A2 Method of operating an expert system and computer systems therefor
07/31/1991EP0439342A2 Method of operating an expert system and computer systems therefor
07/31/1991EP0439341A2 Display for expert system
07/31/1991EP0439300A2 Method and apparatus for automatic execution of interactively operational programs
07/31/1991EP0439199A1 Programmable logic device with means for preloading storage cells therein
07/31/1991EP0438890A2 Unboundedly parallel simulations
07/31/1991EP0438753A2 Circuit for replacing an EPROM
07/31/1991EP0438705A2 Integrated circuit driver inhibit control method for test
07/31/1991CN1013411B Programmable tester with bubble memory
07/30/1991US5036516 Process and means for selftest of RAMs in an electronic device
07/30/1991US5036473 Method of using electronically reconfigurable logic circuits
07/30/1991US5036466 Distributed station armament system
07/30/1991US5036465 Method of controlling and monitoring a store
07/30/1991US5036455 Multiple power supply sensor for protecting shared processor buses
07/30/1991US5036318 Modular ISDN communication system with formation and display of error texts
07/30/1991CA1287177C Microprogrammed systems software instruction undo
07/26/1991CA2033860A1 Diagnostic interpretation of connected sensors
07/25/1991DE4101623A1 Information processing system with multiple processors - each with comparator repeatedly comparing data from another processor until synchronisation is complete or operations is terminated
07/24/1991EP0437491A1 Method of using electronically reconfigurable gate array logic and apparatus formed thereby.
07/24/1991EP0261164B1 Random address system for circuit modules
07/24/1991EP0184639B1 Test system for keyboard interface circuit
07/24/1991CN1053210A Diagnostic system for digital control arrangement
07/23/1991US5034980 Microprocessor for providing copy protection
07/23/1991US5034687 Signature indicating circuit
07/23/1991CA1286789C Control structures file used by a dump program
07/23/1991CA1286785C Universal programmable counter/timer and address register module