Patents
Patents for H04L 7 - Arrangements for synchronising receiver with transmitter (36,432)
03/1987
03/18/1987EP0214676A1 Clock signal regenerator arrangement
03/17/1987US4651330 Multipoint data communications
03/17/1987US4651329 Digital decode logic for converting successive binary zero pulses having opposite polarity to a stream of data pulses
03/17/1987US4651103 Phase adjustment system
03/17/1987US4651026 Clock recovery circuit
03/12/1987WO1987001534A1 Phase changer
03/12/1987WO1987001490A1 Radiotelephone system employing digitized speech/data and embedded signalling
03/12/1987DE3532427A1 Method for fast identification and correction of a + 90 DEG jump of the demodulation carrier in a digital transmission system with QPSK offset modulation
03/11/1987EP0213647A1 Phase detector
03/11/1987EP0213641A2 Delay time adjusting method, circuit, and system
03/10/1987US4649543 Synchronization sequence decoder for a digital radiotelephone system
03/10/1987CA1219042A1 Clock-frequency recovery device adapted to high- frequency radiocommunications in disturbed media
03/04/1987EP0212327A2 Digital signal transmission system having frame synchronization operation
03/03/1987US4648133 Synchronization tracking in pulse position modulation receiver
03/03/1987CA1218773A1 Apparatus and method for providing a transparent interface across a satellite communications link
02/1987
02/25/1987EP0211674A2 Clock signal selection and security arrangements
02/24/1987US4646329 Recovery of frame alignment word having bits distributed in a digital transmission signal
02/24/1987US4646291 Synchronization apparatus in transmitting information on a simplex bus
02/24/1987US4646173 Converting and decoding receiver for digital data recorded in analog form on magnetic tape
02/18/1987CN85103366A Clock signal device of angle modulated carrier restoration
02/17/1987US4644567 Circuit arrangement for synchronizing of clock-signal generated at a receiving station with clock-signals received in telecommunications systems with digital transmission of information
02/17/1987US4644546 Method of digital signal transmission
02/17/1987US4644497 Serial keyboard interface system with frame retransmission after non-timely acknowledgements from data processor
02/10/1987US4642810 Repetitive sequence data transmission system
02/10/1987US4642806 Communications network having a single node and a plurality of outstations
02/10/1987US4642575 Phase-locked loop with supplemental phase signal
02/10/1987CA1217871A Duplex central processing unit synchronization circuit
02/10/1987CA1217845A Digital phase locking arrangement for synchronizing digital span data
02/04/1987EP0210799A2 Access port clock synchronizer
02/03/1987US4641327 Frame synchronization in trellis-coded communication systems
02/03/1987US4641326 Counter circuit operable in synchronism with frame or digital data signal
02/03/1987US4641323 Multi-phase PSK demodulator
02/03/1987US4641128 Method of encoding a stream of data bits, arrangement for performing the method and arrangement for decoding the stream of channel bits obtained in accordance with this method
02/03/1987CA1217564A1 Serial to parallel data conversion circuit
01/1987
01/28/1987CN86105693A 相位同步系统 Phase synchronization system
01/27/1987US4639548 Digital communication system including an error correcting encoder/decoder and a scrambler/descrambler
01/21/1987EP0209306A2 Phase-locked clock regeneration circuit for digital transmission systems
01/20/1987US4638497 Framing code detector for a teletext receiver
01/20/1987US4638478 Frame synchronizing system in a receiver in a time-division multiplex transmission system
01/20/1987US4638313 Addressing for a multipoint communication system for patient monitoring
01/15/1987WO1987000369A1 Data network synchronisation
01/14/1987EP0208537A2 Communication systems
01/14/1987EP0208449A2 Apparatus for synchronization of a first signal with a second signal
01/13/1987US4637018 Automatic signal delay adjustment method
01/13/1987US4637016 Frame synchronization circuit for digital transmission system
01/13/1987US4637006 Apparatus for producing digital information from a transmission medium
01/07/1987EP0207595A2 A rate adaptation circuit and method for asynchronous data on digital networks
01/06/1987US4635280 Bit synchronizer for decoding data
01/06/1987US4635277 Digital clock recovery circuit apparatus
01/06/1987US4635276 Asynchronous and non-data decision directed equalizer adjustment
01/06/1987US4635275 Method and apparatus for detecting synchronous or asynchronous data transmission
01/06/1987US4635274 Bidirectional digital signal communication system
01/06/1987US4635262 Method of detecting synchronization errors in a data transmission system using a linear block code
01/06/1987US4635249 Glitchless clock signal control circuit for a duplicated system
12/1986
12/30/1986US4633488 Phase-locked loop for MFM data recording
12/30/1986US4633487 Automatic phasing apparatus for synchronizing digital data and timing signals
12/30/1986US4633193 Clock circuit synchronizer using a frequency synthesizer controlled by a frequency estimator
12/30/1986EP0205552A1 Clock recovery circuit
12/23/1986US4631718 Method and device for synchronization of system timing
12/23/1986US4631488 QAM demodulator with distortion compensation
12/23/1986CA1215750A1 Digital phase correlator
12/23/1986CA1215749A1 Automatic clock recovery circuit
12/17/1986EP0205378A2 Method and device for timing pull-in of receiving equipment
12/17/1986EP0205305A2 Data transmission and detection method
12/17/1986EP0205150A1 Process and device for the reduction of the jitter of a synchronous digital pulse train to recover its rhythm
12/17/1986EP0204894A2 Clock regenerator
12/17/1986EP0204745A1 Data modem system.
12/10/1986EP0204464A2 Clock synchronizing circuit including a voltage controlled oscillator
12/10/1986EP0204376A2 Ternary signal scanning device
12/10/1986EP0204308A2 Modem communication system having training means and method for training same
12/09/1986US4628519 Digital phase-locked loop circuit
12/09/1986US4628282 Clock generator for digital demodulators
12/09/1986CA1215140A1 Phase comparator and data separator
12/03/1986EP0203592A2 Synchronizing signal detecting apparatus
12/03/1986EP0203500A2 Method and arrangement for transmitting and extracting a timing signal
12/03/1986EP0134217B1 Activation of a transmission link by code sending
12/03/1986EP0131591B1 Activation in a digital subscriber connection
12/03/1986CN86100887A Synchronization recovery in a communications system
12/02/1986US4627080 Adaptive timing circuit
11/1986
11/26/1986EP0202597A2 Circuit for the clock recovery of an isochronous binary signal
11/26/1986CN86103308A Synchronizing signal detecting circuit
11/26/1986CN85104040A Method and apparatus for telephone exchange system synchronize
11/20/1986EP0201935A2 Method and circuit for suppressing sequential "zeroes" data
11/18/1986US4623805 Automatic signal delay adjustment apparatus
11/18/1986CA1214266A1 System for detecting a marker signal inserted in an information signal
11/18/1986CA1214264A1 Digital data detecting apparatus
11/18/1986CA1214236A1 Bit synchronization arrangement for a data modem or data receiver
11/18/1986CA1214227A1 Coherent phase shift keyed demodulator for power line communication systems
11/12/1986CA1213956A Asynchronous data transmission method and circuitry
11/12/1986CA1213946A Circuit for limiting jitter transients during switching
11/11/1986US4622683 Fast acquisition ringing filter MSK demodulator
11/05/1986EP0200370A1 Digital signal reproducing circuit
11/05/1986EP0200274A2 Method and circuit for the phase synchronization of a regenerated reception pulse
10/1986
10/29/1986EP0199147A1 Circuit arrangement for retrieving digital data signals and clock signals included in these data signals
10/28/1986US4620159 Demodulator for multiphase PSK or multilevel QAM signals
10/22/1986EP0198701A2 Phase detection circuit
10/22/1986EP0198448A1 Method for the synchronization of several pulsed transmitters-receivers
10/21/1986CA1213084A1 Multiplex bus system
10/21/1986CA1212999A1 Universal paging device with power conservation
10/15/1986EP0197492A2 A method and an apparatus for modeling bit rate justification