Patents
Patents for H04L 7 - Arrangements for synchronising receiver with transmitter (36,432)
10/2001
10/25/2001US20010033602 Delay lock loop, receiver, and spectrum spreading communication system
10/25/2001US20010033547 OFDM diversity transmission
10/25/2001US20010033407 Linear full-rate phase detector and clock and data recovery circuit
10/25/2001US20010033188 Clock data recovery circuitry associated with programmable logic device circuitry
10/25/2001CA2370577A1 Dc offset and bit timing system and method for use with a wireless transceiver
10/25/2001CA2370546A1 Phase noise and additive noise estimation in a qam demodulator
10/24/2001EP1148686A1 Compensation of sampling frequency offset and local oscillator frequency offset in a OFDM receiver
10/24/2001EP1148685A1 Compensation of sampling frequency offset and local oscillator frequency offset in an OFDM receiver
10/24/2001EP1148659A1 OFDM diversity transmission
10/24/2001EP1148657A2 Demodulation apparatus and demodulation method for mobile communication
10/24/2001EP1148647A2 Circuit arrangement for receiving at least two digital signals
10/24/2001EP1148646A1 Method of optimising digital signal sampling
10/24/2001EP1148642A2 Frequency error estimaton method used in a portable radio system
10/24/2001CN1318947A Method and device for changing output delay of voice data code or video data code
10/24/2001CN1318932A Portable radio system, portable radio device for it and frequency error predicting method
10/24/2001CN1318923A Device and method of obtaiing communication quality
10/24/2001CN1318922A Demodulating device and method for mobile communication
10/24/2001CN1318918A Orthogonal frequency-division multiplex transmitting apparatus and method
10/24/2001CN1318917A Orthogonal frequency-division multiplex receiving apparatus and method
10/24/2001CN1073737C Sync detecting and protecting circuit and method thereof
10/23/2001US6307906 Clock and data recovery scheme for multi-channel data communications receivers
10/23/2001US6307905 Switching noise reduction in a multi-clock domain transceiver
10/23/2001US6307904 Clock recovery circuit
10/23/2001US6307891 Method and apparatus for freezing a communication link during a disruptive event
10/23/2001US6307869 System and method for phase recovery in a synchronous communication system
10/23/2001US6307868 Apparatus and method for SCDMA digital data transmission using orthogonal codes and a head end modem with no tracking loops
10/23/2001US6307850 CDMA radio transmission system
10/23/2001US6307594 Method and device for synchronizing coded signals
10/23/2001US6307413 Reference-free clock generator and data recovery PLL
10/23/2001US6307411 Wide tracking range, auto ranging, low jitter phase lock loop for swept and fixed frequency systems
10/18/2001WO2001078337A1 Method and apparatus for multi-lane communication channel with deskewing capability
10/18/2001US20010032322 High-speed data buffer
10/18/2001US20010031028 Data clocked recovery circuit
10/18/2001US20010031026 Data synchronisation process, and transmission and reception interfaces
10/18/2001US20010031021 Method and apparatus for reproducing timing, and a demodulating apparatus that uses the method and apparatus for reproducing timing
10/18/2001US20010031020 Baud-rate timing recovery
10/18/2001US20010031001 Interpolation filter circuit
10/18/2001US20010030996 Receiver and receiving method in spread spectrum communication system
10/18/2001US20010030991 Apparatus and method for measurement of communication quality in CDMA system
10/18/2001US20010030989 Quadrature amplitude modulation demodulator and receiver
10/18/2001US20010030973 Traffic lights in a code division multiple access (CDMA) modem
10/18/2001US20010030971 Parallel interconnect implemented with hardware
10/18/2001US20010030560 Free-running mode device for phase locked loop
10/18/2001US20010030559 Phase-locked loop based clock phasing implementing a virtual delay
10/18/2001CA2622884A1 Synchronization of timing advance and deviation
10/17/2001EP1146709A2 Clock and carrier recovery in a QAM demodulator
10/17/2001EP1146646A2 Phase locked state detecting apparatus and image processing apparatus
10/17/2001EP1146413A2 Data signal that mimics a clock signals
10/17/2001EP1146412A2 High speed serial link for fully duplexed data communication
10/17/2001EP1145515A1 Trellis decoder with correction of pair swaps, for use in gigabit ethernet transceivers
10/17/2001EP1145514A2 Method and circuit for restoring a binary signal
10/17/2001EP1145511A2 Equalizer for multi-pair gigabit ethernet
10/17/2001EP1145478A1 Determination of a chronological point of reference when receiving a radio signal
10/17/2001EP1145477A1 A synchronisation method and arrangement
10/17/2001EP1145470A1 Synchronization of ofdm signals
10/17/2001EP1145469A1 Common packet channel
10/17/2001EP1145468A1 In-band signalling for synchronization in a voice communications network
10/17/2001EP1145439A2 Phase detector
10/17/2001EP1145024A2 Dynamic register with iddq testing capability
10/17/2001EP0688447B1 De-skewer for serial data bus
10/17/2001EP0676105B1 Method and arrangement for dynamic allocation of multiple carrier-wave channels for multiple access by frequency division multiplexing
10/17/2001EP0505781B1 Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system
10/17/2001CN1318231A Method and appts. for providing time adjustment to wireless communication system
10/17/2001CN1073307C Length chanbeable decoding device for full loading byte data
10/17/2001CN1073249C Information transfer system transmitter, receiver and record carrier for use in system
10/16/2001US6304624 Coherent detecting method using a pilot symbol and a tentatively determined data symbol, a mobile communication receiver and an interference removing apparatus using the coherent detecting method
10/16/2001US6304623 Precision timing generator system and method
10/16/2001US6304622 Flexible bit rate clock recovery unit
10/16/2001US6304582 Synchronization system using multiple modes of operation
10/16/2001US6304113 Device for synchronizing a reference event of an analog signal on a clock
10/16/2001US6304071 Phase detector that samples a read signal at sampling points and delay
10/16/2001CA2212292C Device for and method of aligning in time digital signals, for example a clock signal and a data stream
10/11/2001WO2001076115A1 Matched filter and method for determining correlation
10/11/2001WO2001076102A1 Radio base station and program recorded medium
10/11/2001WO2001047204A8 Correction of a sampling frequency offset in an orthogonal frequency division multiplexing system by sidelobe analysis of pilot subcarriers
10/11/2001US20010028693 Method and circuit for glithch-free changing of clocks having different phases
10/11/2001US20010028691 Data carrier having means for synchronization with a received data stream
10/11/2001US20010028663 Method, transmitter and transmission system
10/11/2001DE10016724A1 Circuit arrangement for reception of at least two digital signals
10/10/2001EP1143676A1 Diversity receiver free from decoding error, and clock regeneration circuit for diversity receiver
10/10/2001EP1143633A2 Apparatus and method for acquisition of communication quality
10/10/2001EP1143632A2 Apparatus and method for measurement of communication quality in CDMA system
10/10/2001EP1143621A2 Digital phase control circuit
10/10/2001EP1143312A2 Time synchronisation of the parts of an installation
10/10/2001EP1142242A1 Communications system and associated deskewing methods
10/10/2001EP1142241A1 Communications system and associated deskewing methods
10/10/2001EP1142240A1 Communications system and associated methods with out-of-band control
10/10/2001EP1142189A1 Systems and methods for acquiring synchronization using dual detection thresholds
10/10/2001EP1142176A2 Clock synchronization in telecommunications network using system frame number
10/10/2001EP1142168A1 Device for generating carriers for wavelength-division multiplexing optical transmission system with rz signals
10/10/2001EP1142163A1 Handset time synchronization to a wireless telephone base station
10/10/2001EP1142146A1 Pilot filtering in the presence of phase disconiuties in a cdma receiver
10/10/2001EP1142120A1 Pll and gain control for clock recovery
10/10/2001EP0995283A4 A method and apparatus for segmentation, reassembly and inverse multiplexing of packets and atm cells over satellite/wireless networks
10/10/2001EP0872096A4 Apparatus for demodulating and decoding video signals
10/10/2001CN1317181A Method for forming or detecting single sequence and transmitter unit and receiver unit
10/10/2001CN1072872C Device and method for clock phase adjustment between duplicated clock circuits
10/09/2001US6301318 Pipelined phase detector for clock recovery
10/09/2001US6301317 Synchronization system and method for digital communication systems
10/09/2001US6301311 Non-coherent, non-data-aided pseudo-noise synchronization and carrier synchronization for QPSK or OQPSK modulated CDMA system