| Patents for H04L 7 - Arrangements for synchronising receiver with transmitter (36,432) |
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| 01/06/2005 | US20050002299 Clock generating device |
| 01/06/2005 | US20050001655 Phase correction circuit |
| 01/05/2005 | EP1493233A1 Selectable clocking architecture |
| 01/05/2005 | EP0891683B1 Combined minicell alignment and header protection method and apparatus |
| 01/05/2005 | EP0776549B8 Paging method and apparatus |
| 01/05/2005 | CN1561619A Parallel data communication having skew intolerant data groups and data validity indicator |
| 01/05/2005 | CN1561589A Maintaining a global time reference among a group of networked devices |
| 01/05/2005 | CN1561582A Code tracking loop with automatic power normalization |
| 01/05/2005 | CN1561031A Interconnected network web information issuing method |
| 01/05/2005 | CN1561023A Digital clock recovery method and its circuit |
| 01/05/2005 | CN1561022A Method of internal data base main-spare synchronous |
| 01/05/2005 | CN1183731C Transmission system, receiver and device for selecting |
| 01/05/2005 | CN1183728C Method for synchronising OFDM symbols during radio transmissions |
| 01/05/2005 | CN1183706C Operation and maintenance of clock distribution networks having redundancy |
| 01/05/2005 | CN1183688C Communication protocol between a communication device and an external accessory |
| 01/05/2005 | CN1183596C Synchronous data collecting circuit with low voltage level and method therefor |
| 01/05/2005 | CN1183539C Data modulation method and recording and reconstruction device and method using said method |
| 01/04/2005 | US6839863 Input data processing circuit comprising of a readout circuit for selecting one of first and second FIFO buffers having a faster clock |
| 01/04/2005 | US6839862 Parallel data communication having skew intolerant data groups |
| 01/04/2005 | US6839861 Method and system for selecting data sampling phase for self timed interface logic |
| 01/04/2005 | US6839860 Capture clock generator using master and slave delay locked loops |
| 01/04/2005 | US6839447 Synchronized binaural hearing system |
| 01/04/2005 | US6839392 Methods and apparatus for adaptive mimic rejection |
| 01/04/2005 | US6839391 Method and apparatus for a redundant clock |
| 01/04/2005 | US6839330 Method and apparatus for improving asynchronous transfer mode operation over noisy, high speed wireless links |
| 01/04/2005 | US6839329 Cell flow synchronization establishing system of wireless ATM access system |
| 01/04/2005 | US6838945 Data resynchronization circuit |
| 12/30/2004 | US20040268173 Self-aligning data path converter for multiple clock systems |
| 12/30/2004 | US20040267993 Information transfer protocol |
| 12/30/2004 | US20040267953 Media foundation media processor |
| 12/30/2004 | US20040264620 Communication device |
| 12/30/2004 | US20040264619 Adjustable phase controlled clock and data recovery circuit |
| 12/30/2004 | US20040264617 Asynchronous communication circuit |
| 12/30/2004 | US20040264616 I/O link with configurable forwarded and derived clocks |
| 12/30/2004 | US20040264614 Host interface data receiver |
| 12/30/2004 | US20040264613 Circuit for bit skew suppression in high speed multichannel data transmission |
| 12/30/2004 | US20040264612 Clock and data recovery method and apparatus |
| 12/30/2004 | US20040264611 Improved circuit for bit alignment in high speed multichannel data transmission |
| 12/30/2004 | US20040264550 Random access preamble coding for initiation of wireless mobile communications sessions |
| 12/30/2004 | US20040264492 Ranging arrangement and method for TDMA communications |
| 12/30/2004 | US20040263225 Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop |
| 12/30/2004 | US20040263224 Method for producing a control signal which indicates a frequency error |
| 12/30/2004 | DE19744071B4 Eine programmierbare Logiksteuervorrichtung verwendendes Steuerungssystem A programmable logic controller-use control system |
| 12/29/2004 | WO2004114676A2 Method and apparatus for processing null packets in a digital media receiver |
| 12/29/2004 | WO2004114675A1 Method and apparatus for error detection of compressed video in a digital media receiver |
| 12/29/2004 | WO2004114596A1 Frame format decoder and training sequence generator for wireless lan networks |
| 12/29/2004 | WO2004114583A2 Method and apparatus for false sync lock detection in a digital media receiver |
| 12/29/2004 | WO2004114562A1 Phase control method, phase control system, and phase control program |
| 12/29/2004 | WO2004095082A3 Method and apparatus for reducing interference in an optical data stream using dataindependent equalization |
| 12/29/2004 | EP1492290A2 Bit alignment in multichannel data transmission |
| 12/29/2004 | EP1492259A1 Ofdm demodulation apparatus |
| 12/29/2004 | EP1492022A2 Multimedia processor |
| 12/29/2004 | EP1490998A2 Method and circuit arrangement for the monitoring and management of data traffic in a communication system with several communication nodes |
| 12/29/2004 | EP1397879A4 Clock recovery circuit |
| 12/29/2004 | EP1112648B1 A system and method for sending and receiving data signals over a clock signal line |
| 12/29/2004 | CN1558583A Segment reliable clock phase difference detecting method |
| 12/29/2004 | CN1558582A Method for realizing 16b/20b encoder logic based on double 8b/10b encoder |
| 12/29/2004 | CN1558579A Optimization service allocated channel adaptive routing method |
| 12/29/2004 | CN1182722C Video signal compression device |
| 12/29/2004 | CN1182669C Method for transmitting service channel in frame plesiochronous to said service channel and related system |
| 12/29/2004 | CN1182662C Carrier integration method and device for carrier integration method |
| 12/28/2004 | USRE38678 Method and apparatus for synchronizing a data communications system to a periodic digital impairment |
| 12/28/2004 | US6836852 Method for synchronizing multiple serial data streams using a plurality of clock signals |
| 12/28/2004 | US6836851 Two-step synchronization method in which two modules are synchronized first by frequency followed by a synchronization in phase |
| 12/28/2004 | US6836747 Measured data synchronization system |
| 12/28/2004 | US6836522 Clock signal extracting circuit, parallel digital interface including clock signal extracting circuit, clock signal extracting method and parallel data bit signal synchronizing method using clock signal extracting method |
| 12/28/2004 | US6836520 Method and apparatus for establishing synchronization with a synchronization signal |
| 12/28/2004 | US6836511 Apparatus for processing a reproduced digital signal |
| 12/28/2004 | US6836507 Symbol synchronizer for software defined communications system signal combiner |
| 12/28/2004 | US6836506 Synchronizing timing between multiple air link standard signals operating within a communications terminal |
| 12/28/2004 | US6836505 Spreading code generation apparatus and CDMA receiver |
| 12/28/2004 | US6836503 Apparatus for data recovery in a synchronous chip-to-chip system |
| 12/28/2004 | US6836188 PLL circuit and method for eliminating self-jitter in a signal which is received by a control circuit |
| 12/23/2004 | WO2004111968A2 Remote meter reading apparatus and method of manufacturing the same |
| 12/23/2004 | WO2004062158A3 Adaptive signal latency control for communications systems signals |
| 12/23/2004 | WO2004044897A3 Single clock data communication in direct stream digital system |
| 12/23/2004 | US20040259583 Communication apparatus and method for controlling transmission power and communication apparatus |
| 12/23/2004 | US20040258410 Bit synchronization circuit and central terminal for PON systems |
| 12/23/2004 | US20040258188 Clock and data recovery device coping with variable data rates |
| 12/23/2004 | US20040258185 Device for reproducing received data for radio data communication and a method of adjusting frequency therefor |
| 12/23/2004 | US20040258183 High speed circuits for electronic dispersion compensation |
| 12/23/2004 | US20040258181 Differential receiver circuit with electronic dispersion compensation |
| 12/23/2004 | US20040258145 Differential receiver circuit with electronic dispersion compensation for optical communications systems |
| 12/23/2004 | US20040258138 Correlator and delay lock loop circuit |
| 12/23/2004 | US20040258099 Clock synchronisation over a packet network |
| 12/23/2004 | US20040257469 Video snychronisation |
| 12/23/2004 | US20040257124 Spread spectrum clock generator capable of frequency modulation with high accuracy |
| 12/23/2004 | DE102004024938A1 Taktungsregenerierungsschleife mit nichtganzzahliger Länge Timing recovery loop with non-integer length |
| 12/23/2004 | DE102004013115A1 Speichereinheit und Schaltung zum Formen eines Kommunikationssignals Memory unit and circuit for forming a communication signal |
| 12/22/2004 | EP1489776A2 Method and apparatus for generating preamble using chaotic sequence |
| 12/22/2004 | EP1489762A1 Synchronization acquisition apparatus and synchronization acquisition method |
| 12/22/2004 | EP1488565A1 Synchronization data detection unit and method |
| 12/22/2004 | EP1488562A1 Synchronization system for all optical slotted ring dynamic networks |
| 12/22/2004 | EP1479175A4 Method and apparatus for synchronizing base stations |
| 12/22/2004 | EP1284064B1 Method and device for controlling the timing of a digital receiver |
| 12/22/2004 | EP1027805A4 System and method for maintaining timing synchronization in a digital video network |
| 12/22/2004 | EP0996889A4 A frame format and frame assembling/disassembling method for the frame format |
| 12/22/2004 | CN1557089A Process, arrangement, devices for seizure of a shared telephone line |
| 12/22/2004 | CN1557077A Method for reconstructing data pulsed with a symbol rate from an analog distorted signal |
| 12/22/2004 | CN1556604A Frame head detecting device of STM-1 structure in SDH system and method |