Patents
Patents for H04L 7 - Arrangements for synchronising receiver with transmitter (36,432)
02/2006
02/28/2006US7006587 Preamble aided synchronization
02/28/2006US7006585 Recovering data encoded in serial communication channels
02/28/2006US7006582 Receiving circuit
02/28/2006US7006577 Apparatus and method for detecting transmission mode in digital audio receiver using null symbols
02/28/2006US7006558 Method and apparatus for correcting frequency offset and storage medium storing control program thereof
02/23/2006WO2006019779A2 Method and apparatus for determining time
02/23/2006WO2005072329A3 Communication channel calibration for drift conditions
02/23/2006US20060041785 Reception data synchronizing apparatus and method, and recording medium with recorded reception data synchronizing program
02/23/2006US20060041576 Data processsing deviceand data reception processing device
02/23/2006US20060039515 Method and apparatus for estimating SFO in digital receiver
02/23/2006US20060039514 Universal sampling rate converter in electronic devices and methods
02/23/2006US20060039513 Clock and data recovery systems and methods
02/23/2006US20060038661 Data transfer on a current supply line
02/23/2006DE102004039016A1 Verfahren und Vorrichtung zum Schätzen der Frequenz und/oder der Phase mit blockweiser Grobschätzung Method and apparatus for estimating the frequency and / or phase with blockwise rough estimate
02/23/2006DE102004038834A1 Verfahren zum Erzeugen von Präambel- und Signalisierungsstrukturen in einem MIMO-OFDM-Übertragungssystem A method for generating preamble and signaling structures in a MIMO-OFDM transmission system
02/22/2006EP1290889B1 System and method of voice recognition near a wireline node of a network supporting cable television and/or video delivery
02/22/2006EP1086546B1 Method of selecting synchronization pattern from a test signal
02/22/2006EP0917790B1 Demodulator with digital circuit for recovering carrier and rhythm
02/22/2006CN1739271A Data transmission device and data transmission method
02/22/2006CN1738452A Synchronizing push to talk service in wireless communication system
02/22/2006CN1738437A Synchronizing video/audio of mobile communication terminal
02/22/2006CN1738285A Error indication message processing method
02/22/2006CN1243425C Speed matching method and digital communication system
02/21/2006US7003407 Circuit for detecting and formatting data frames
02/21/2006US7003285 Communication with multi-sensory devices
02/21/2006US7003064 Method and apparatus for periodic phase alignment
02/21/2006US7003063 Detecting preambles of data packets
02/21/2006US7003062 Method and system for distribution of clock and frame synchronization information
02/21/2006US7003060 High precision data and clock output circuit
02/21/2006US7003059 Jabber counter mechanism for elastic buffer operation
02/21/2006US7003056 Symbol timing tracking and method therefor
02/21/2006US7003030 Receivers, methods, and computer program products for an analog modem that receives data signals from a digital modem
02/21/2006US7003027 Efficient PCM modem
02/21/2006US7003023 Digital isolation system with ADC offset calibration
02/21/2006US7002376 Phase detector for a programmable clock synchronizer
02/21/2006CA2249540C Coding system and decoding system
02/16/2006WO2006017460A2 Data transmission synchronization
02/16/2006WO2006016140A1 Sample acquisition timing adjustment
02/16/2006US20060036915 Deskew circuit and disk array control device using the deskew circuit, and deskew method
02/16/2006US20060034410 Pll with balanced quadricorrelator
02/16/2006US20060034408 Clock generator having a 50% duty-cycle
02/16/2006US20060034407 Base station synchronization
02/16/2006US20060034406 Apparatus for timing recovery and method thereof
02/16/2006US20060034405 Method and apparatus for high-speed input sampling
02/16/2006US20060034404 High resolution digital clock multiplier
02/16/2006US20060034403 Phase-locked loop having dynamically adjustable up/down pulse widths
02/16/2006US20060034402 System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system
02/16/2006US20060034394 Circuit for adaptive sampling edge position control and a method therefor
02/16/2006US20060034379 Synchronization method and related apparatus of an ofdm digital communication system
02/16/2006US20060034322 Communication timing control method and apparatus, node, and communication system
02/16/2006DE102004047398B3 Gemeinsamer Detektor für Taktphase und Trägerphase Common detector for clock phase and carrier phase
02/16/2006DE102004035532A1 Vorrichtung und Verfahren zum Erzeugen eines Referenztaktübertragungssignals und Ableiten eines Referenztakts aus demselben Apparatus and method for generating a reference clock transmission signal and deriving a reference clock from the same
02/16/2006DE10109974B4 Verfahren und System zur digitalen Echtzeit-Datenverarbeitung Method and system for real-time digital data processing
02/16/2006DE10014671B4 Vorrichtung und Verfahren zum Detektieren von Datenkommunikationseigenschaften Apparatus and method for detecting data communication properties
02/15/2006EP1626591A1 Synchronizing push to talk service in wireless communication system
02/15/2006EP1626547A2 Partial response receiver
02/15/2006EP1625503A1 Method for data signal transfer across different clock-domains
02/15/2006CN1735005A Device and method for synchronous parallel data transmission using reference signal
02/15/2006CN1242638C Phase-locked loop synthesizer in mobile phone
02/15/2006CN1242590C Time management device for managing time and synchronizing with other device
02/15/2006CN1242583C CDMA receiver
02/15/2006CN1242579C Method and device for determining code synchronizing time or receiving information in CDMA mode and CDMA receiver
02/15/2006CN1242320C Method and circuit for transmitting data from a first system to a second system
02/14/2006US7000164 Method for scan testing and clocking dynamic domino circuits in VLSI systems using level sensitive latches and edge triggered flip flops
02/14/2006US7000048 Apparatus and method for parallel processing of network data on a single processing thread
02/14/2006US6999891 Independent deskew lane
02/14/2006US6999547 Delay-lock-loop with improved accuracy and range
02/14/2006US6999546 System and method for timing references for line interfaces
02/14/2006US6999545 Method and system for undersampled symbol synchronization
02/14/2006US6999544 Apparatus and method for oversampling with evenly spaced samples
02/14/2006US6999543 Clock data recovery deserializer with programmable SYNC detect logic
02/14/2006US6999542 Data ready indicator between different clock domains
02/14/2006US6999529 Digital AM demodulator
02/14/2006US6999527 Phase demodulator, symbol timing recovery circuit and the method thereof
02/14/2006US6999406 Reception synchronization apparatus and demodulating apparatus using the same
02/14/2006CA2400830C A phase detector
02/09/2006WO2006014914A2 System and method for the mitigation of spectral lines in an ultrawide bandwitdh transceiver
02/09/2006WO2005112582A3 Dual-mode equalizer in an atsc-dtv receiver
02/09/2006WO2005072355A3 Data sampling clock edge placement training for high speed gpu-memory interface
02/09/2006US20060031698 Drift tracking feedback for communication channels
02/09/2006US20060031696 Method and apparatus for determining time
02/09/2006US20060029177 Unified digital architecture
02/09/2006US20060029176 Data transmission synchronization
02/09/2006US20060029174 Transceiver having a jitter control processor with a receiver stage and a method of operation thereof
02/09/2006US20060029173 Method and apparatus for output data synchronization with system clock in DDR
02/09/2006US20060029172 Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals
02/09/2006US20060029161 Technique to simultaneously distribute clock signals and data on integrated circuits, interposers, and circuit boards
02/09/2006US20060029141 Method and apparatus for modulating and demodulating data into a variable length code and a providing medium for implementing the method
02/09/2006US20060028199 Dynamic register with IDDQ testing capability
02/09/2006DE102004035257B3 Electronic controller for phase equalization uses phase locked loop arrangement with integrator equalization module to eliminate phase errors
02/08/2006EP1624683A2 Method for coding image signals
02/08/2006EP1624635A2 Device and method for synchronous parallel data transmission using reference signal
02/08/2006EP1623546A2 Method and wireless device employing a preamble to initiate communications
02/08/2006EP1623544A1 Method and devices for transmitting data on a data line between a central control unit and at least one data processing unit interface of at least one decentralized data processing unit
02/08/2006EP1131916B1 A method and a circuit for retiming a digital data signal
02/08/2006CN1732621A Circuit arrangement
02/08/2006CN1731680A Frequency modulator for directly modulating VCO and modulating method
02/08/2006CN1241436C Device for synchronizing at least one discrete assembly with central assembly
02/08/2006CN1241393C Restoring equipment and method for mobile signal and synchronous signal
02/08/2006CN1241378C Demodulator of receiver