Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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10/27/2010 | CN101873132A Pll circuit |
10/27/2010 | CN101873131A Delay locked loop and method of driving delay locked loop |
10/27/2010 | CN101873130A Pll with loop bandwidth calibration circuit |
10/26/2010 | US7823111 Semiconductor integrated circuit device, semiconductor integrated circuit design method, and semiconductor integrated circuit design apparatus |
10/26/2010 | US7823001 Latency adjustment between integrated circuit chips |
10/26/2010 | US7822113 Integrated decision feedback equalizer and clock and data recovery |
10/26/2010 | US7821581 Fully integrated tuner architecture |
10/26/2010 | US7821350 Methods and apparatus for dynamic frequency scaling of phase locked loops for microprocessors |
10/26/2010 | US7821345 Calibrating an oscillator and corresponding calibration device |
10/26/2010 | US7821344 VCO driving circuit and frequency synthesizer |
10/26/2010 | US7821343 Transmitter with multiple phase locked loops |
10/26/2010 | US7821313 DLL circuit |
10/26/2010 | US7821312 Techniques for selecting phases of clock signals |
10/26/2010 | US7821311 Delay locked loop circuit and memory device having the same |
10/26/2010 | US7821310 DLL circuit having duty cycle correction and method of controlling the same |
10/26/2010 | US7821309 Delay locked loop circuit |
10/26/2010 | US7821308 Delay locked loop and method of controlling the same |
10/26/2010 | US7821307 Bandgap referenced power on reset (POR) circuit with improved area and power performance |
10/21/2010 | WO2010118980A1 Digital phase-locked loop architecture |
10/21/2010 | WO2010068604A3 Adaptive cartesian loop transmitter for broadband and optimal loop stability adjustment |
10/21/2010 | US20100265247 Method of modulating/demodulating a signal, apparatus for performing the method and display apparatus including the apparatus |
10/21/2010 | US20100265001 Digital pll circuit and semiconductor integrated circuit |
10/21/2010 | US20100264995 RF Circuits Including Transistors Having Strained Material Layers |
10/21/2010 | US20100264993 Pll with loop bandwidth calibration circuit |
10/21/2010 | US20100264969 Phase interpolator with adaptive delay adjustment |
10/21/2010 | US20100264968 Delay locked loop and method of driving delay locked loop |
10/21/2010 | US20100264967 Clock and data recovery circuits |
10/21/2010 | US20100264966 Semiconductor integrated circuit and method of controlling the same |
10/21/2010 | US20100264965 Fractional-N frequency synthesizer having reduced fractional switching noise |
10/21/2010 | US20100264964 Pll circuit |
10/21/2010 | US20100264963 Clock data recovery circuit and multiplied-frequency clock generation circuit |
10/21/2010 | US20100264962 Vco driving circuit and frequency synthesizer |
10/21/2010 | US20100264961 Oscillation frequency control circuit |
10/20/2010 | CN101867545A Frequency synthesizer of full-frequency range multi-band orthogonal frequency division multiplexing ultra-wideband radio frequency transceiver |
10/20/2010 | CN101867540A Phase lock detector in digital QPSK receiver |
10/20/2010 | CN101867371A FPGA-based method for realizing linear frequency-modulated signal |
10/20/2010 | CN101867370A Pll circuit |
10/20/2010 | CN101867369A Phase detection module and phase detection method |
10/20/2010 | CN101867368A Clock data recovery circuit and multiplied-frequency clock generation circuit |
10/20/2010 | CN101867367A Circuit and method for interpolative delay |
10/20/2010 | CN101867366A Triangular wave generator with variable frequency and amplitude |
10/20/2010 | CN101867357A Circuit for changing frequency of a signal and frequency change method thereof |
10/20/2010 | CN101867345A Integrated inductance capacitance voltage-controlled oscillator for ultra-wideband low-phase noise |
10/20/2010 | CN101592843B Dual-magnetic light trap system |
10/19/2010 | US7817976 System and method for inverting automatic frequency control |
10/19/2010 | US7817769 Real time clock rate checker and recovery mechanism |
10/19/2010 | US7817761 Test techniques for a delay-locked loop receiver interface |
10/19/2010 | US7817760 Delay lock loops for wireless communication systems |
10/19/2010 | US7817522 Recording clock generation apparatus |
10/19/2010 | US7816963 Phase interpolator with adaptive delay adjustment |
10/19/2010 | US7816962 Delay locked loop with improved jitter and clock delay compensating method thereof |
10/19/2010 | US7816961 System and method for signal adjustment |
10/19/2010 | US7816960 Circuit device and method of measuring clock jitter |
10/19/2010 | US7816959 Clock circuit for reducing long term jitter |
10/19/2010 | US7816958 Means to reduce the PLL phase bump caused by a missing clock pulse |
10/19/2010 | US7816957 Power on reset generating circuit and method thereof |
10/19/2010 | US7816956 Power-on reset circuit |
10/14/2010 | WO2010079503A3 Method and system for open loop compensation of delay variations in a delay line |
10/14/2010 | US20100260242 Time digital converter, digital pll frequency synthesizer, transceiver, and receiver |
10/14/2010 | US20100259435 Delay circuit |
10/14/2010 | US20100259307 Semiconductor device |
10/14/2010 | US20100259306 Phase locked loop and method for charging phase locked loop |
10/14/2010 | US20100259305 Injection locked phase lock loops |
10/14/2010 | US20100259304 Power detecting device, power supply device using the same and reference voltage generator |
10/13/2010 | EP2239849A2 Apparatus and method for compensating for process, voltage, and temperature variation of the time delay of a digital delay line |
10/13/2010 | EP2238702A1 Packet error handling |
10/13/2010 | EP2238688A1 Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals |
10/13/2010 | EP2238683A1 Frequency synthesizer and related method for generating wideband signals |
10/13/2010 | EP2238416A1 Synchronous phase detection circuit |
10/13/2010 | CN201608704U 一种锁相环频率综合器 One kind of PLL frequency synthesizer |
10/13/2010 | CN1667750B Apparatus for generating internal clock signal |
10/13/2010 | CN101861701A Synthesizer, synthesizer module, and reception device and electronic device using same |
10/13/2010 | CN101860366A Highly configurable PLL architecture for programmable logic device |
10/13/2010 | CN101860365A Reference clock source switching method and device |
10/13/2010 | CN101860364A System and method for observing threshold voltage variations |
10/13/2010 | CN101860363A Signal processing circuit and signal processing method |
10/13/2010 | CN101860362A Dual-loop tuning method for low-vibration high frequency difference frequency and phase locking and electrical architecture thereof |
10/13/2010 | CN101860361A Delay-locked loop |
10/13/2010 | CN101860360A Phase-locked loop, compensation circuit and compensation method |
10/13/2010 | CN101860350A Digital control frequency generator |
10/13/2010 | CN101860087A Method and system for improving wireless energy transmission efficiency by using feedback tuning method |
10/13/2010 | CN101859212A Digitalizer, digital conversion method and capacitive touch panel device |
10/13/2010 | CN101326475B Method and circuit for local clock generation and smartcard including it thereon |
10/13/2010 | CN101197571B Automatic switchover phase locking loop |
10/13/2010 | CN101178612B Chip for providing extended clock signal, memory controller and system |
10/13/2010 | CN101176390B Reduced-size VCO/PLL module |
10/12/2010 | US7814344 System and method for power control for ASIC device |
10/12/2010 | US7813460 High-speed data sampler with input threshold adjustment |
10/12/2010 | US7812679 Multi-band frequency generation method and apparatus |
10/12/2010 | US7812678 Digital calibration techniques for segmented capacitor arrays |
10/12/2010 | US7812677 Synthesizer characterization in real time |
10/12/2010 | US7812658 Clock generation circuit |
10/12/2010 | US7812657 Methods and apparatus for synchronizing with a clock signal |
10/12/2010 | US7812656 Data driver circuit and delay-locked loop |
10/12/2010 | US7812655 Delay-locked loop control |
10/12/2010 | US7812654 Delay locked loop circuits and method for controlling the same |
10/12/2010 | US7812653 Power supply noise rejection in PLL or DLL circuits |
10/12/2010 | US7812652 Locked loops, bias generators, charge pumps and methods for generating control voltages |
10/12/2010 | US7812651 PLL apparatus |
10/12/2010 | US7812650 Bias voltage generation circuit and clock synchronizing circuit |