Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
09/2014
09/30/2014US8847693 Method and system for using a MEMS structure as a timing source
09/30/2014US8847691 Apparatus and method for recovering burst-mode pulse width modulation (PWM) and non-return-to-zero (NRZ) data
09/30/2014US8847690 System and method for built in self test for timing module holdover
09/30/2014US8847653 Dither control circuit and devices having the same
09/30/2014US8847647 Synchronizer circuits with failure-condition detection and correction
09/30/2014US8847646 Semiconductor integrated circuit
09/30/2014US8847645 Semiconductor device and semiconductor system including the same
09/30/2014US8847644 Semiconductor apparatus
09/30/2014US8847643 Semiconductor device and information processing apparatus
09/30/2014US8847642 Charge pump phase-locked loop circuits
09/30/2014US8847641 Phase comparison device and DLL circuit
09/30/2014US8847640 Trigger signal detection apparatus
09/30/2014US8847625 Single clock distribution network for multi-phase clock integrated circuits
09/25/2014WO2014153472A1 Multi-wire open-drain link with data symbol transition based clocking
09/25/2014WO2014150902A1 Fast turn on system for a synthesized source signal
09/25/2014WO2014150625A1 An area-efficient pll with a low-noise low-power loop filter
09/25/2014WO2014150575A1 Local oscillator (lo) generator with multi-phase divider and phase locked loop
09/25/2014WO2014150030A1 Ring oscillator circuit and method
09/25/2014WO2014149438A1 Integrated clock differential buffering
09/25/2014US20140286470 Phase locked loop and clock and data recovery circuit
09/25/2014US20140285271 Optical module for atomic oscillator and atomic oscillator
09/25/2014US20140285270 Electronic Oscillation Circuit
09/25/2014US20140285246 Pll circuit
09/25/2014US20140285245 Pll circuit
09/25/2014US20140285238 Pll circuit and phase comparison method in pll circuit
09/24/2014EP2782255A1 Fractional-N frequency synthesizer using a subsampling pll and method for calibrating the same
09/24/2014EP2782254A1 Pll circuit
09/24/2014EP2782253A1 PLL circuit and phase comparison method in PLL circuit
09/24/2014EP2782252A1 Low-power and all-digital phase interpolator-based clock and data recovery architecture
09/24/2014EP2781025A2 Apparatus and method for recovering burst-mode pulse width modulation (pwm) and non-return-to-zero (nrz) data
09/23/2014US8841975 Digitally controlled oscillator device and high frequency signal processing device
09/23/2014US8841973 Circuit arrangement for generation of radio frequency output signals which form a broadband frequency ramp
09/23/2014US8841960 Clock signal generating circuit and power supply including the same
09/23/2014US8841949 Measurement initialization circuitry
09/23/2014US8841948 Injection-controlled-locked phase-locked loop
09/23/2014US8841947 Power-on reset circuit
09/23/2014US8841946 Electronic circuit, safety critical system, and method for providing a reset signal
09/23/2014US8841945 Semiconductor device and method of driving the same
09/18/2014WO2014139430A1 Fully integrated differential lc pll with switched capacitor loop filter
09/18/2014US20140281652 Data synchronization across asynchronous boundaries using selectable synchronizers to minimize latency
09/18/2014US20140269848 Spread-spectrum apparatus for voltage regulator
09/18/2014US20140269783 Low-power and all-digital phase interpolator-based clock and data recovery architecture
09/18/2014US20140269120 Synchronous semiconductor memory device having dual delay locked loop circuit and method of managing dual delay locked loop circuit
09/18/2014US20140266478 Low power oscillator with negative resistance boosting
09/18/2014US20140266471 Programmable frequency divider for local oscillator generation
09/18/2014US20140266355 Phase-locked loop, method of operating the same, and devices having the same
09/18/2014US20140266354 Digital phase-locked loop
09/18/2014US20140266353 Mixed signal tdc with embedded t2v adc
09/18/2014US20140266352 Delay lock loop phase glitch error filter
09/18/2014US20140266351 Delay-locked loop circuit and method of controlling the same
09/18/2014US20140266350 Signal generating circuit and method thereof
09/18/2014US20140266349 Method for operating a circuit including a timing calibration function
09/18/2014US20140266348 Method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path
09/18/2014US20140266347 Continuous adaptive training for data interface timing calibration
09/18/2014US20140266346 All-digital phase-locked loop for adaptively controlling closed-loop bandwidth, method of operating the same, and devices including the same
09/18/2014US20140266345 Electronic circuit, radar apparatus, and method of performing self-diagnosis on radar apparatus
09/18/2014US20140266343 Area-efficient pll with a low-noise low-power loop filter
09/18/2014US20140266342 High-frequency signal processing device
09/18/2014US20140266341 Digital phase-locked loop using phase-to-digital converter, method of operating the same, and devices including the same
09/18/2014US20140266340 Integrated clock differential buffering
09/18/2014US20140266339 Method and apparatus for gapping
09/18/2014US20140266338 Biased bang-bang phase detector for clock and data recovery
09/18/2014US20140266337 Noise management method and circuit for asynchronous signals
09/18/2014US20140266336 Clock signal timing-based noise suppression
09/18/2014US20140266328 Frequency synthesis with gapper
09/18/2014US20140266308 Clock amplitude detection
09/18/2014US20140262032 Method and apparatus for generating a variable clock used to control a component of a substrate processing system
09/18/2014DE112012003966T5 Hochleistungsteiler mit Vorsteuerung, Taktverstärker und Reihen-Entzerrspulen High power divider with feedforward control, pull amplifier and series Entzerrspulen
09/17/2014EP2779490A2 Transmit reference signal cleanup within a synchronous network application
09/17/2014EP2779459A1 Biased bang-bang phase detector for clock and data recovery
09/17/2014EP2777157A2 System and method of stabilizing charge pump node voltage levels
09/17/2014EP2777156A2 Oscillator based frequency locked loop
09/16/2014US8839020 Dual mode clock/data recovery circuit
09/16/2014US8838033 System and method for signal amplification
09/16/2014US8837659 Distributed digital reference clock
09/16/2014US8836442 Variable capacitance with delay lock loop
09/16/2014US8836434 Method and system for calibrating a frequency synthesizer
09/16/2014US8836412 Charge pump with a power-controlled clock buffer to reduce power consumption and output voltage ripple
09/16/2014US8836394 Method and apparatus for source-synchronous signaling
09/16/2014US8836393 Fast measurement initialization for memory
09/16/2014US8836392 Digital locked loop for producing a clock having a selected frequency ratio relative to a clock produced by a MEMS-based oscillator
09/16/2014US8836391 Plesiochronous clock generation for parallel wireline transceivers
09/16/2014US8836390 Phase-locked loops that share a loop filter and frequency divider
09/16/2014US8836389 Apparatus, system, and method for controlling temperature and power supply voltage drift in a digital phase locked loop
09/16/2014US8836388 Smart card clock generator circuits wth autonomous operation capability and method of operating the same
09/16/2014US8836387 Methods and systems for reducing jitter
09/16/2014US8836386 Semiconductor device with power-up scheme
09/16/2014US8836373 Phase difference quantization circuit, delay value control circuit thereof, and delay circuit
09/16/2014CA2735676C Divide-by-three quadrature frequency divider
09/12/2014WO2014136399A1 Injection-locked oscillator
09/12/2014WO2014134777A1 Cycle slip detection method and correction method of digital signals and related apparatus
09/11/2014US20140253256 Monolithic clock generator and timing/frequency reference
09/11/2014US20140253255 Voltage controlled oscillator band-select fast searching using predictive searching
09/11/2014US20140253193 Differential amplifiers, clock generator circuits, delay lines and methods
09/11/2014US20140253192 Method of distributing a clock signal, a clock distributing system and an electronic system comprising a clock distributing system
09/11/2014DE112011106014T5 Kleinen Jitter und niedrige Latenz aufweisende Low-Power-Taktung mit gemeinsamen Referenztaktsignalen für On-Package-Ein-/Ausgabe-Schnittstellen Small jitter and low latency exhibiting low-power clocking with common reference clock signals for on-Package-I / O interfaces
09/11/2014DE102014002283A1 Vorrichtung zum dynamischen Anpassen eines Taktgebers bezüglich Änderungen einer Stromversorgung Apparatus for dynamically adjusting a clock with respect to changes of a power supply
09/11/2014DE102013021712A1 Fensteraktivierter Zeit-zu-digital-Wandler und Verfahren zur Erfassung einer Phase eines Referenzsignals Activated window time-to-digital converter and method for detecting a phase of a reference signal
09/10/2014EP2775626A1 Frequency synthesis system and method
09/10/2014EP2775611A1 Self-oscillating class-d amplifier and self-oscillating frequency control method for self-oscillating class-d amplifier
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