Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
07/2006
07/20/2006US20060158264 Frequency synthesizer
07/20/2006US20060158263 Fast switching phase lock loop (PLL) device and method
07/20/2006US20060158262 Offset correction in a feedback system for a voltage controlled oscillator
07/20/2006US20060158261 Smart lock-in circuit for phase-locked loops
07/20/2006US20060158260 Device and method for carrying out frequency synthesis
07/20/2006US20060158259 Dual loop PLL, and multiplication clock generator using dual loop PLL
07/20/2006US20060158235 Phase-locked loops
07/20/2006US20060158234 Phase-lock loop and loop filter thereof
07/20/2006US20060158233 Programmable phase-locked loop circuitry for programmable logic device
07/20/2006DE102004046404B4 Schaltungsanordnung und Verfahren zum Bestimmen einer Frequenzdrift in einem Phasenregelkreis Circuit arrangement and method for determining a frequency drift in a phase locked loop
07/19/2006CN1805571A Method of switching communication module in communication devices
07/19/2006CN1805287A Delay locked loop using synchronous mirror delay
07/19/2006CN1805271A High order íãí¸ noise shaping interpolator for direct digital frequency synthesis
07/19/2006CN1265555C Method and apparatus for clock circuit
07/19/2006CN1265554C Phase lock loop with phase rotator
07/19/2006CN1265205C System and method for detecting open-phase of compressor system
07/18/2006US7079616 Process for generating a variable frequency signal, for instance for spreading the spectrum of a clock signal, and device therefor
07/18/2006US7079615 Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
07/18/2006US7079611 System and method for synchronizing an asynchronous frequency for use in a digital system
07/18/2006US7079575 Equalization for crosspoint switches
07/18/2006US7079172 Clock generating circuit and image-forming apparatus
07/18/2006US7079043 Radio frequency data communications device
07/18/2006US7078979 Phase controlled oscillator circuit with input signal coupler
07/18/2006US7078977 Fast locking phase-locked loop
07/18/2006US7078952 Device for calibrating a clock signal
07/18/2006US7078950 Delay-locked loop with feedback compensation
07/18/2006US7078949 Analog delay locked loop having duty cycle correction circuit
07/18/2006US7078948 Low-pass filter, feedback system, and semiconductor integrated circuit
07/18/2006US7078947 Phase-locked loop having a spread spectrum clock generator
07/18/2006US7078946 Analog PLL with switched capacitor resampling filter
07/18/2006US7078945 Semiconductor device having logic circuit and macro circuit
07/18/2006US7078938 Method of detecting phase difference, phase detector for performing the same and clock-and-data recovering device including the phase detector
07/18/2006CA2385182C Master slave frame lock method
07/13/2006WO2006074103A1 Display device with speaker grill
07/13/2006WO2006073597A2 Method and system for operating a laser self-modulated at alkali-metal atom hyperfine frequence
07/13/2006WO2005062698A3 System and method for managing protocol network failures in a cluster system
07/13/2006US20060153041 Frequency and phase control apparatus and maximum likelihood decoder
07/13/2006US20060152980 Low-power delay buffer circuit
07/13/2006US20060152624 Method for generating a video pixel clock and an apparatus for performing the same
07/13/2006US20060152295 Semiconductor integrated circuit device and wireless communication device
07/13/2006US20060152291 Oscillator circuit, semiconductor device and semiconductor memory device provided with the oscillator circuit, and control method of the oscillator circuit
07/13/2006US20060152290 Apparatus and method of oscillating wideband frequency
07/13/2006US20060152289 Variable lock-in circuit for phase-locked loops
07/13/2006US20060152260 Semiconductor device having delay drift compensation circuit that compensates for delay drift caused by temperature and voltage variations in clock tree
07/13/2006US20060152259 Delay locked loop circuit for a synchronous semiconductor memory device and a method of generating information about a load connected to a data pin of a synchronous semiconductor memory device
07/13/2006DE10308921B4 Phasenregelanordnung zur Frequenzsynthese Phase control arrangement for frequency synthesis
07/13/2006DE102005061911A1 Verzögerungsregelschleife, die eine Synchronspiegelverzögerung verwendet Delay locked loop that uses a synchronous mirror delay
07/13/2006DE102005050828A1 Fractional divider for phase locked loop, has counter counting preset number of periods of signal selected by multiplexer to output counter signal, where desired fractional denominator is not provided by averaging counter signal
07/12/2006EP1678821A1 Multi-primary distributed active transformer amplifier power supply and control
07/12/2006EP1497924B1 Arrangement and method relating to phase locking comprising storing means
07/12/2006EP1495543A4 Apparatus and method for symbol timing recovery
07/12/2006CN2796251Y Automatic installing frequency device for radio microphone
07/12/2006CN1802811A Transmission system, signal receiver, test apparatus and test head
07/12/2006CN1802810A Clock and data recovery method and apparatus
07/12/2006CN1802791A High resolution PWM generator or digitally controlled oscillator
07/12/2006CN1801926A Mixed-media telecommunication call set-up
07/12/2006CN1801738A Device for detecting computer access state in network and detecting method
07/12/2006CN1801691A Quadrature phase signal producing apparatus and data recovery circuit
07/12/2006CN1801625A Delay locked loop and semiconductor memory device having the same
07/12/2006CN1801624A Fast locking method and apparatus and frequency synthesizer
07/12/2006CN1801623A Phase-locked loop abatement detecting method
07/12/2006CN1801622A Phase-locked loop frequency locking judging method and circuit
07/12/2006CN1264277C Microreglation of frequency range for delay line
07/11/2006US7076677 Same edge strobing for source synchronous bus systems
07/11/2006US7076377 Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit
07/11/2006US7076215 Transmitter-receiver
07/11/2006US7076014 Precise synchronization of distributed systems
07/11/2006US7076013 Clock synchronization device
07/11/2006US7075957 Controlling an optical source using a beat frequency
07/11/2006US7075866 Clock extracting device of a disc reproducing apparatus having a gain command unit for designating a loop gain
07/11/2006US7075384 Delta-sigma modulated fractional-N PLL frequency synthesizer and wireless communication apparatus
07/11/2006US7075383 Frequency modulator, frequency modulating method, and wireless circuit
07/11/2006US7075378 High spectral purity microwave oscillator using air-dielectric cavity
07/11/2006US7075377 Quadrature voltage controlled oscillators with phase shift detector
07/11/2006US7075376 Frequency synthesizer using digital pre-distortion and method
07/11/2006US7075375 Phase locked loop for controlling an optical recording device and method thereof
07/11/2006US7075351 Method and apparatus for generating a multiphase clock
07/11/2006US7075348 Differential charge pump with common-mode feedback compensation
07/11/2006US7075345 Frequency converter having low supply voltage
07/11/2006US7075285 Delay locked loop circuit and method for testing the operability of the circuit
07/11/2006CA2215376C Direct digital synthesizer driven pll frequency synthesizer with clean-up pll
07/06/2006WO2006071472A1 Processor-controlled clock-data recovery
07/06/2006WO2006070234A1 Vco gain tuning using voltage measurements and frequency iteration
07/06/2006WO2006070224A1 Vco center frequency tuning and limiting gain variation
07/06/2006US20060146918 Delay lock loops for wireless communication systems
07/06/2006US20060146891 Semiconductor device
07/06/2006US20060145773 Ring-type voltage oscillator with improved duty cycle
07/06/2006US20060145771 Voltage controlled oscillator having improved phase noise
07/06/2006US20060145770 Integrated PLL loop filter and charge pump
07/06/2006US20060145769 VCO center frequency tuning and limiting gain variation
07/06/2006US20060145768 Selectively pretuning and updating a phase lock loop
07/06/2006US20060145767 VCO gain tuning using voltage measurements and frequency iteration
07/06/2006US20060145741 Digital delay lock loop
07/06/2006US20060145740 VCDL-based dual loop DLL having infinite phase shift function
07/06/2006US20060145739 Power-up detection circuit that operates stably regardless of variations in process, voltage, and temperature, and semiconductor device thereof
07/06/2006US20060145738 Method and circuit configuration for synchronous resetting of a multiple clock domain circuit
07/06/2006DE10335835B4 Phasenregelkreis und Verfahren zum Einstellen eines Signals in einem Phasenregelkreis Phase-locked loop and method for adjusting a signal in a phase locked loop
07/06/2006DE10319899B4 Verfahren und Frequenzvergleichseinrichtung zum Erzeugen eines Kontrollsignals, das eine Frequenzabweichung anzeigt The method and frequency comparison means for generating a control signal indicating a frequency deviation
07/06/2006DE10310015B4 Optoelektrischer Phasenregelkreis zur Rückgewinnung des Taktsignals in einem digitalen optischen Übertragungssystem An opto-electrical phase-locked loop for recovering the clock signal in a digital optical transmission system
07/05/2006EP1677446A1 Frequency combining apparatus and frequency combining method