| Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714) |
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| 12/27/1994 | US5377156 Semiconductor device incorporating main and stand-by boosted internal power supply for compensating for deviation on operating condition and fabrication process conditions |
| 12/27/1994 | US5376849 High resolution programmable pulse generator employing controllable delay |
| 12/27/1994 | US5376848 Delay matching circuit |
| 12/27/1994 | US5376846 Temperature compensation circuit and method of operation |
| 12/27/1994 | US5376845 Apparatus and method for ECL-like signal to CMOS signal conversion |
| 12/22/1994 | WO1994029959A1 A method for multiplying the frequency of a digital signal and a frequency multiplier circuit |
| 12/21/1994 | EP0630110A1 Level conversion circuit |
| 12/21/1994 | EP0630107A1 Differential load stage with stepwise variable impedance, and clocked comparator comprising such a load stage |
| 12/20/1994 | US5374894 Transition detection circuit |
| 12/20/1994 | US5374860 Multi-tap digital delay line |
| 12/20/1994 | US5374859 Low power dual power supply high resolution comparator |
| 12/20/1994 | US5374855 Apparatus and a method for detecting the coincidence of two signal levels |
| 12/16/1994 | CA2125827A1 Level conversion circuit |
| 12/15/1994 | DE4319977A1 Circuit arrangement for suppressing dynamic interference in digital circuits |
| 12/14/1994 | EP0629061A1 Optical receiving system |
| 12/14/1994 | EP0573419B1 Low power dissipation autozeroed comparator circuit |
| 12/14/1994 | EP0554267B1 Method and circuit arrangement for preparing the output signal of a revolution speed sensor |
| 12/13/1994 | US5373473 Amplifier circuit and semiconductor memory device employing the same |
| 12/13/1994 | US5373400 Dynamic threshold updating circuit for a maximum likelihood detector using both positive and negative comparators |
| 12/13/1994 | US5373254 Method and apparatus for controlling phase of a system clock signal for switching the system clock signal |
| 12/08/1994 | DE4318378A1 Circuit arrangement for the suppression of dynamic interference in digital circuits, in particular in integrated circuits |
| 12/07/1994 | EP0627819A1 Level conversion circuit for signal of ECL-level |
| 12/07/1994 | EP0627816A1 Synchronized clocking disable and enable circuits |
| 12/07/1994 | EP0627815A1 Edge selective delay circuit |
| 12/07/1994 | EP0627137A1 Digitally controlled phase shifter |
| 12/06/1994 | US5371421 Low power BiMOS amplifier and ECL-CMOS level converter |
| 12/06/1994 | US5371417 Multiple frequency output clock generator system |
| 12/06/1994 | US5371416 Circuit and method of synchronizing clock signals |
| 11/30/1994 | EP0626756A2 Output circuit having three power supply lines |
| 11/30/1994 | EP0626631A1 Clock generator |
| 11/30/1994 | EP0626582A1 Temperature-compensated voltage comparator |
| 11/30/1994 | EP0626113A1 Self-compensating digital delay semiconductor device with selectable output delays and method therefor |
| 11/30/1994 | EP0626112A1 Compensated digital delay semiconductor device with selectable output taps and method therefor |
| 11/30/1994 | CN1095872A 自动测试时钟选择设备 Automatic Test Equipment Clock Selection |
| 11/30/1994 | CN1095871A Delay matching circuit |
| 11/30/1994 | CN1026842C Sync tip clamp circuitry |
| 11/29/1994 | US5369640 Method and apparatus for clock skew reduction through remote delay regulation |
| 11/29/1994 | US5369311 Clock generator control circuit |
| 11/29/1994 | US5369309 Analog-to-digital converter and method of fabrication |
| 11/24/1994 | WO1994027225A1 Control module for reducing ringing in digital signals on a transmission line |
| 11/22/1994 | US5367490 Semiconductor integrated circuit device with two variable delay lines in writing circuit control |
| 11/22/1994 | US5367204 Multiple digital clock edge generator circuit and method |
| 11/19/1994 | CA2096469A1 Circuit for generating a stretched clock in quarter-cycle increments |
| 11/17/1994 | EP0624950A2 Delay matching circuit |
| 11/17/1994 | EP0624878A2 Semiconductor integrated circuit |
| 11/15/1994 | US5365181 Frequency doubler having adaptive biasing |
| 11/15/1994 | US5365130 Self-compensating output pad for an integrated circuit and method therefor |
| 11/15/1994 | US5365129 Temperature-compensated voltage level sense circuit |
| 11/15/1994 | US5365128 High-resolution synchronous delay line |
| 11/15/1994 | US5365122 Meta stable resistant signal detector |
| 11/15/1994 | US5365120 Data slicer with hold |
| 11/15/1994 | US5365119 Circuit arrangement |
| 11/13/1994 | CA2105148A1 Sigma delta converter for vortex flowmeter |
| 11/10/1994 | WO1994026028A1 Frequency doubler |
| 11/10/1994 | WO1994026027A1 Quadrature oscillator |
| 11/10/1994 | WO1994026026A1 Ring oscillator |
| 11/10/1994 | WO1994026025A1 Ring oscillator |
| 11/09/1994 | EP0623998A1 Circuit to generate two complementary signals |
| 11/09/1994 | EP0623997A1 Hysteresis comparator working with a low voltage supply |
| 11/09/1994 | CN1026543C 信号延迟电路 Signal delay circuit |
| 11/08/1994 | US5363406 Pulse width modulation apparatus |
| 11/08/1994 | US5363100 Digital peak-threshold tracking method and apparatus |
| 11/08/1994 | US5362996 Staggered output circuit for noise reduction |
| 11/08/1994 | US5362995 Voltage comparing circuit |
| 11/08/1994 | US5362993 Weighted average servo burst peak detector for disk drive read |
| 11/08/1994 | US5362992 Electronic control of peak detector response time |
| 11/08/1994 | CA2000995C Wordline voltage boosting circuits for complementary mosfet dynamic memories |
| 11/02/1994 | EP0491840A4 Signal digitizing method and system |
| 11/02/1994 | EP0489785B1 Method for the recognition of the wanted signal and circuit for carrying out the method |
| 11/01/1994 | US5361277 Method and apparatus for clock distribution and for distributed clock synchronization |
| 10/27/1994 | WO1994024797A1 High-speed, differential line driver |
| 10/27/1994 | WO1994024793A1 Composite clock signal |
| 10/27/1994 | CA2159190A1 Composite clock signal |
| 10/26/1994 | EP0621694A2 Low power interface circuit |
| 10/26/1994 | EP0621691A2 Complementary-signal BiCMOS line driver with low skew |
| 10/26/1994 | EP0621690A2 Reset logic circuit and method |
| 10/26/1994 | EP0621460A1 Sensor signal processing unit |
| 10/25/1994 | US5359652 Tone receiver comprising a switch capacitor zero crossing detector |
| 10/25/1994 | US5359301 Process-, temperature-, and voltage-compensation for ECL delay cells |
| 10/25/1994 | US5359238 Analog to digital interface circuit with internal resistance compensation and integrity verification |
| 10/25/1994 | US5359234 Circuit and method of sensing process and temperature variation in an integrated circuit |
| 10/25/1994 | US5359232 Clock multiplication circuit and method |
| 10/19/1994 | EP0620518A1 Methods and apparatus for generating linear-feedback-shift-register sequences |
| 10/19/1994 | CN1093842A Signal controlled phase shifter |
| 10/18/1994 | US5357217 Signals generator having non-overlapping phases and high frequency |
| 10/18/1994 | US5357150 Defect tolerant envelope follower |
| 10/18/1994 | US5357147 Wave-shaping apparatus |
| 10/18/1994 | US5357146 Glitch-free clock multiplexer |
| 10/18/1994 | CA2019774C Device for detecting in a binary signal a pointer consisting of a continuous sequence of binary elements having the same value |
| 10/13/1994 | WO1994023496A1 On-delay circuit |
| 10/12/1994 | EP0619653A1 Digital phase-locked loop |
| 10/12/1994 | EP0619650A2 Delay circuit for delaying differential signals |
| 10/12/1994 | EP0619540A1 Circuit and method of synchronizing clock signals |
| 10/12/1994 | EP0619052A1 Shifting phase of a clock signal, in particular for clock recovery of a digital data signal |
| 10/12/1994 | EP0619051A1 Circuit for generating variable-frequency pulses from periodic pulses |
| 10/12/1994 | EP0571411B1 Circuitry for generating binary signals from ternary signals |
| 10/11/1994 | US5355397 Clock start up stabilization for computer systems |
| 10/11/1994 | US5355038 Architecture for programmable delay line integrated circuit |
| 10/11/1994 | US5355037 High performance digital phase locked loop |
| 10/05/1994 | EP0618678A2 Digital pulse width modulator circuit with proportional dither |