Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 3 - Circuits for generating electric pulses; Monostable, bistable or multistable circuits
Patents for H03K 3 - Circuits for generating electric pulses; Monostable, bistable or multistable circuits (23,299)
10/2009
10/29/2009US20090267640 System including preemphasis driver circuit and method
10/29/2009US20090267638 Apparatus, System and Method of Power State Control
10/29/2009DE102007056956B4 Schaltung zur Regelung der Stromversorgung eines Verbrauchers und Verfahren zum Betrieb einer Schaltung Circuit for controlling the power to a load and method for operating a circuit
10/28/2009EP1639706B1 Improvements in or relating to circuit performance
10/28/2009EP1514343B1 An arrangement for low power clock generation
10/28/2009CN101567683A Annular oscillator and dual supply inverter thereof
10/28/2009CN101567679A Differential voltage-controlled adjustable time delay unit with full swing
10/28/2009CN101567678A Numerical control ring-shaped oscillator with adjustable grade
10/28/2009CN101567677A Reference clock frequency generator
10/28/2009CN101567519A Large-current pulse LD laser driving power supply
10/28/2009CN101567172A Driving circuit of liquid crystal display
10/27/2009US7609608 Method and apparatus for data transfer using a time division multiple frequency scheme with additional modulation
10/27/2009US7609119 Reference voltage generator for logic elements providing stable and predefined gate propagation time
10/27/2009US7609101 PWM switching direct voltage circuit
10/27/2009US7609100 On-chip signal waveform measurement apparatus for measuring signal waveforms at detection points on IC chip
10/27/2009US7609097 Driver circuit and a method for matching the output impedance of a driver circuit with a load impedance
10/27/2009CA2569820C A method for portable plc configurations
10/22/2009WO2009128921A2 Method and apparatus for producing a metastable flip flop
10/22/2009WO2009128746A1 Self-timed trigger with single-rail data input
10/22/2009WO2009128044A1 Method of reducing the occurrence of burn-in due to negative bias temperature instability
10/22/2009WO2009127848A2 Clock distribution buffer
10/22/2009WO2009127757A1 Capacitance/frequency converter with a variable capacitance as an oscillator power supply source
10/22/2009US20090261911 Multi-phase oscillator
10/22/2009US20090261877 Duty cycle correction circuit with wide-frequency working range
10/22/2009US20090261870 Power-on detection circuit for detecting minimum operational frequency
10/22/2009US20090261867 Semiconductor device having voltage output circuit
10/22/2009US20090261865 High voltage CMOS output buffer constructed from low voltage CMOS transistors
10/22/2009DE102008018678A1 Vorrichtung und Verfahren zum Erzeugen einer Zufallsbitfolge Apparatus and method for generating a random bit sequence
10/22/2009DE102004036892B4 Pegelabwärtswandler und Schnittstellenschaltkreis Level-down converter and interface circuitry
10/21/2009EP1367715B1 Random number generator and probability generator
10/21/2009CN101562408A Magneto driving curve displacement actuator driver
10/21/2009CN101562390A Oscillator in alternating current/direct current converter for pulse width modulation
10/21/2009CN100553130C Ultrafast pulse power switch device as well as autoexcitation picosecond magnitude power pulse generator
10/20/2009US7606096 Semiconductor integrated circuit device
10/20/2009US7605636 Power gating structure, semiconductor including the same and method of controlling a power gating
10/20/2009US7605632 High-power electric pulse generator
10/20/2009US7605631 Delay line synchronizer apparatus and method
10/20/2009US7605627 Programmable boosting and charge neutralization
10/20/2009US7605626 Clock generator and clock duty cycle correction method
10/20/2009US7605619 I/O protection under over-voltage and back-drive conditions by single well charging
10/15/2009US20090256643 Voltage controlled oscillator, and pll circuit and radio communication device each including the same
10/15/2009US20090256615 Pulse signal generating device, transport device, image forming apparatus, and pulse generating method
10/15/2009US20090256613 Pulse signal generating device, transport device, image forming apparatus, and pulse generating method
10/15/2009US20090256609 Low power flip flop through partially gated slave clock
10/15/2009US20090256608 Low leakage data retention flip flop
10/15/2009US20090256607 Powered ring to maintain io independent of the core of an integrated circuit device
10/15/2009US20090256606 Digital signal input device and method of controlling the same
10/15/2009US20090256596 Flip-flop, frequency divider and rf circuit having the same
10/15/2009DE102008018727A1 Binary random-number generator for generating sequence of random bits in e.g. cryptographic applications, has downstream digital signal processing unit for producing sequence of random bits
10/14/2009CN201328106Y Thyristor anti-jamming device in pulse electromagnetic wave generator
10/14/2009CN101558380A Maintaining input and/or output configuration and data state during and when coming out of a low power mode
10/14/2009CN101557226A Circuit device for controlling push-push operation of pulse power supply
10/14/2009CN101557209A D-type timing flip-flop circuit
10/14/2009CN100550626C Master-slave flip-flop, trigger flip-flop and counter
10/14/2009CN100550625C Narrow pulse generating method and apparatus thereof
10/14/2009CN100550624C Pulsed current generator circuit with charge booster
10/13/2009US7602273 Semiconductor device, method of manufacturing the same, and electronic device
10/13/2009US7602258 Circuits, systems, and methods for a voltage controlled oscillator with coarse, fine, and center tuning
10/13/2009US7602230 Control integrated circuit for a charge pump
10/13/2009US7602225 Power on reset circuit for a digital device including an on-chip voltage down converter
10/13/2009US7602219 Inverting cell
10/08/2009WO2009124145A2 Fractional and integer pll architectures
10/08/2009WO2009122598A1 Logic circuit
10/08/2009US20090251225 Fractional And Integer PLL Architectures
10/08/2009US20090251223 Techniques for characterizing performance of transistors in integrated circuit devices
10/08/2009US20090251213 Method for adjusting threshold voltage and circuit therefor
10/08/2009US20090251190 System and method for generating two effective frequencies using a single clock
10/08/2009US20090251188 Clock driver and charge pump incluing the same
10/08/2009US20090251185 Data retention device for multiple power domains
10/08/2009US20090251175 Input buffer capable of reducing delay skew
10/08/2009US20090251174 Output buffer of a source driver applied in a display
10/07/2009CN101552605A An interface circuit capable of tolerating high voltage input
10/07/2009CN101551671A Automobile vehicle controller monitoring resetting method and device
10/07/2009CN100547407C Signal generating circuit of electric capacitance measurement
10/06/2009US7600167 Flip-flop, shift register, and scan test circuit
10/06/2009US7598818 Temperature compensation for a voltage-controlled oscillator
10/06/2009US7598794 Well bias architecture for integrated circuit device
10/06/2009US7598790 Clock synthesis using polyphase numerically controlled oscillator
10/06/2009US7598789 Signal transferring system with unequal lengths of connecting paths and method thereof
10/06/2009US7598786 Duty cycle correction circuit and method thereof
10/06/2009US7598779 Dual-mode LVDS/CML transmitter methods and apparatus
10/06/2009US7598774 Reduced power consumption limited-switch dynamic logic (LSDL) circuit
10/01/2009US20090249142 Method for race prevention and a device having race prevention capabilities
10/01/2009US20090243734 Method and device for determining a duty cycle offset
10/01/2009US20090243687 Robust time borrowing pulse latches
10/01/2009US20090243686 Latch circuit and electronic device
10/01/2009US20090243685 Signal processing device
10/01/2009US20090243677 Clock generator and methods using closed loop duty cycle correction
10/01/2009US20090243667 Output driving device
10/01/2009US20090243666 A driving circuit to drive an output stage
10/01/2009US20090243665 Cascode Driver with Gate Oxide Protection
10/01/2009US20090243655 Current driver suitable for use in a shared bus environment
10/01/2009US20090243512 Drive circuit, light emitting diode head, and image forming apparatus
09/2009
09/30/2009EP2106025A1 The method for shaping of high voltage pulse in a generator module and high voltage generator setup
09/30/2009CN101547087A Method for designing control unit of DES encryption system based on reversible logical gate
09/30/2009CN101546994A Method for designing arithmetic unit of DES encryption system based on reversible logical gate
09/30/2009CN100546185C High voltage pulse circuit
09/30/2009CN100546171C Oscillation circuit and electronic equipment including the oscillation circuit
09/29/2009US7595676 Comparator and method with controllable threshold and hysteresis
09/29/2009US7595661 Low voltage differential signaling drivers including branches with series resistors
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