Patents
Patents for H03K 3 - Circuits for generating electric pulses; Monostable, bistable or multistable circuits (23,299)
08/2001
08/02/2001WO2001056145A1 Power-conserving external clock for use with a clock-dependent integrated circuit
08/02/2001WO2001056084A1 Low power dissipation mos jam latch
08/02/2001WO2001056062A2 Charge balancing system
08/02/2001WO2001056008A1 Pointing device with z-axis functionality and reduced component count
08/02/2001WO2001055837A1 Apparatus and method for modifying an m-sequence with arbitrary phase shift
08/02/2001WO2001055836A1 Random number generator
08/02/2001US20010010501 Circuitry with resistive input impedance for generating pulses from analog waveforms
08/02/2001US20010010474 Apparatus and method for an improved master-slave flip-flop with non-overlapping clocks
08/02/2001CA2398730A1 Power-conserving external clock for use with a clock-dependent integrated circuit
08/01/2001EP1120913A1 Method and apparatus for timing control
08/01/2001EP1120912A1 Method and apparatus for timing control
08/01/2001EP1120911A1 Voltage-controlled oscillator
08/01/2001EP1119912A1 Pulse generator for generating a voltage pulse and corresponding method
08/01/2001EP0896761B1 Integrated clock-signal generating circuit
07/2001
07/31/2001US6269388 Circuit for generating a trapezoidal signal with controlled wavefronts, particularly for a converter of satellite receiver
07/31/2001US6269027 Non-volatile storage latch
07/31/2001US6268775 Dual capacitor oscillator circuit
07/31/2001US6268752 Master-slave flip-flop circuit
07/26/2001WO2001054279A1 A register having a ferromagnetic memory cells
07/26/2001WO2001006611A3 Dual-level voltage shifters for low leakage power
07/26/2001WO2000076069A3 Calibration techniques for a precision relaxation oscillator integrated circuit with temperature compensation
07/26/2001WO2000072444A9 Scannable flip flop circuit and method of operating an integrated circuit
07/26/2001US20010009402 System for quantizing an analog signal utilizing a resonant tunneling diode differential ternary quantizer
07/26/2001US20010009392 Voltage-controlled oscillator
07/24/2001US6266364 Data processor for generating spread codes
07/24/2001US6266290 Programmable latches that include non-volatile programmable elements
07/24/2001US6266200 Magnetic disk storage apparatus
07/24/2001US6265923 Dual rail dynamic flip-flop with single evaluation path
07/24/2001US6265896 Level transfer circuit for LVCMOS applications
07/19/2001US20010008381 Level shift circuit and image display device
07/19/2001DE10063307A1 Auffangschaltung für Daten und deren Ansteuerungsverfahren Latch circuit for data and its control method
07/19/2001DE10059937A1 Oszillator mit reduziertem Energieverbrauch und kurzer Stabilisierungszeit Oscillator with reduced energy consumption and a short stabilization time
07/18/2001CN1304213A High speed dynamic latch
07/18/2001CN1068686C Pseudo-noise sequence generator with fast offset adjustment
07/17/2001US6263082 Pseudorandom number generation circuit and data communication system employing the same
07/17/2001US6262613 Pulse duration changer for stably generating output pulse signal from high-frequency input pulse signal and method used therein
07/15/2001WO2001052012A1 Constant voltage supply circuit, substrate of constant voltage supply circuit, and method of applying constant voltage
07/12/2001WO2001050621A2 Multiple mask arrangement for jumping in pseudo-noise sequences
07/11/2001EP1088376A4 Magnetic modulator voltage and temperature timing compensation circuit
07/11/2001CN1303174A Internal scintillation pulse device and its application
07/10/2001US6259390 Method and apparatus for generating pulses from analog waveforms
07/10/2001US6259330 Ring oscillator having variable coarse and fine delays
07/10/2001US6259292 Three-terminal inverting hysteretic transistor switch
07/10/2001US6259248 Motion detection by pulse signal generation
07/05/2001WO2001048936A2 Zero delay mask for galois lfsr
07/05/2001US20010006357 Oscillation/amplification circuit which is unsusceptible to noise and capable of supplying a stable clock
07/05/2001US20010006352 Metal oxide semiconductor transistor circuit and semiconductor integrated circuit using the same
07/05/2001US20010006350 Data latch circuit and driving method thereof
07/04/2001EP1112632A1 Apparatus and method for generating scrambling code in umts mobile communication system
07/04/2001EP1112618A1 Digital circuit
07/04/2001CN1302495A Apparatus and method for generating spreading code in CDMA communication system
07/03/2001US6256360 Method for reducing transients in a clock signal generating system
07/03/2001US6255888 Level shift circuit
07/03/2001US6255881 High tunability CMOS delay element
07/03/2001US6255875 High-speed clock-enabled latch circuit
07/03/2001US6255861 Hybrid low voltage swing sense amplifier
06/2001
06/28/2001WO2001047115A1 Method and apparatus to produce a random bit sequence
06/28/2001WO2001047114A1 A method and an electrical device for efficient multirate pseudo random noise (pn) sequence generation
06/28/2001WO2001047113A1 Method and device for self-clock controlled pseudo random noise (pn) sequence generation
06/28/2001WO2001047112A2 High speed flip-flop
06/28/2001WO2001047073A1 High speed magnetic modulator voltage and temperature timing compensation circuit
06/28/2001WO2000072444A3 Scannable flip flop circuit and method of operating an integrated circuit
06/28/2001US20010005155 Method and an electrical device for efficient multi-rate pseudo random noise (PN) sequence generation
06/28/2001US20010005153 Semiconductor integrated circuit
06/27/2001EP1111785A1 Method and device for self-clock controlled pseudo random noise (PN) sequence generation
06/27/2001EP1111784A1 A method and an electrical device for efficient multi-rate pseudo random noise (PN) sequence generation
06/27/2001EP1111783A1 Protected D-type master-slave flip-flop
06/27/2001EP1111782A2 Differential sense amplifier circuit and dynamic logic circuit using the same
06/27/2001EP1111770A1 Oscillator arrangement for low-frequency quartz and having an improved temperature dependency
06/27/2001EP1111615A1 Logic circuit
06/27/2001EP1110135A1 Method and device for generating a random signal and digital-to-analog converting systems using same
06/27/2001CN1301085A Controller oscilator system and method
06/27/2001CN1301024A Differential reading-out amplifying circuit and dynamic logic circuit for using it
06/27/2001CN1301023A Logic circuit
06/26/2001US6252467 Voltage controlled oscillator including a plurality of differential amplifiers
06/26/2001US6252452 Semiconductor device
06/26/2001US6252448 Coincident complementary clock generator for logic circuits
06/26/2001US6252430 Latching comparator utilizing resonant tunneling diodes and associated method
06/26/2001US6252424 Semiconductor integrated circuit having I2CBUS interface
06/26/2001US6252418 Reduced area active above-supply and below-ground noise suppression circuits
06/21/2001US20010004323 Switching arrangements
06/21/2001US20010004226 Low frequency quartz oscillator device with improved thermal characteristics
06/21/2001US20010004220 Secured master-slave D type flip-flop circuit
06/21/2001US20010004218 Semiconductor integrated circuit device having power reduction mechanism
06/21/2001US20010004193 Pulse-controlled analog flip-flop
06/21/2001US20010004123 Semiconductor integrated circuit having diagnosis function
06/20/2001EP1109317A1 A controller oscillator system and method
06/20/2001EP1109314A1 Pulse power system for a gas discharge laser
06/20/2001CN1300464A quadrature oscillator network for transmitter
06/19/2001US6249876 Frequency jittering control for varying the switching frequency of a power supply
06/19/2001US6249455 Multi-step pulse generating circuit for flash memory
06/19/2001US6249192 Clock injection system
06/19/2001US6249168 Clock pulse generator
06/19/2001US6249163 Logic circuits
06/19/2001US6249162 Hysteresis circuit
06/19/2001US6249145 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit
06/19/2001US6249009 Random number generator
06/14/2001WO2001043274A2 Oscillator having multi-phase complementary outputs
06/14/2001WO2001042890A1 Method of mask calculation for generation of shifted pseudo-noise (pn) sequence
06/14/2001US20010003530 Pseudorandom noise generator for WCDMA