Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
04/2007
04/17/2007US7205581 Thyristor structure and overvoltage protection configuration having the thyristor structure
04/17/2007US7205579 Light emitting diode package with coaxial leads
04/17/2007US7205574 Optical semiconductor device
04/17/2007US7205573 Light-emitting device having a compound substrate
04/17/2007US7205572 Organic electroluminescent display device
04/17/2007US7205571 Thin film transistor substrate for display device and fabricating method thereof
04/17/2007US7205570 Thin film transistor array panel
04/17/2007US7205568 Solid state image pickup apparatus and radiation image pickup apparatus
04/17/2007US7205565 Thin film transistor and OLED including the same
04/17/2007US7205564 Resistance change memory having organic semiconductor layer
04/17/2007US7205562 Phase change memory and method therefor
04/17/2007US7205547 Radiographic imaging substrate, radiographic imaging apparatus, and radiographic imaging system
04/17/2007US7205545 Electromagnetic radiation detection device with integrated housing comprising two superposed detectors
04/17/2007US7205532 Integrated ball grid array optical mouse sensor packaging
04/17/2007US7205526 Methods of fabricating layered lens structures
04/17/2007US7205523 Solid state image pickup device, method of manufacturing the same, and camera
04/17/2007US7205522 Pixel circuit for image sensor
04/17/2007US7205473 Photovoltaic powered multimedia greeting cards and smart cards
04/17/2007US7205242 Method for forming isolation layer in semiconductor device
04/17/2007US7205241 Method for manufacturing semiconductor device with contact body extended in direction of bit line
04/17/2007US7205219 Methods of forming integrated circuits devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate
04/17/2007US7205211 Method for handling semiconductor layers in such a way as to thin same
04/17/2007US7205210 Semiconductor structure having strained semiconductor and method therefor
04/17/2007US7205206 Method of fabricating mobility enhanced CMOS devices
04/17/2007US7205204 Semiconductor device and fabrication method for the same
04/17/2007US7205199 Method of forming a recess channel trench pattern, and fabricating a recess channel transistor
04/17/2007US7205198 Method of making a bi-directional read/program non-volatile floating gate memory cell
04/17/2007US7205195 Method for fabricating NROM memory cells with trench transistors
04/17/2007US7205194 Method of fabricating a flash memory cell
04/17/2007US7205193 Semiconductor device and method for fabricating the same
04/17/2007US7205192 Semiconductor memory device capable of preventing oxidation of plug and method for fabricating the same
04/17/2007US7205191 Semiconductor integrated circuit and method of designing the same
04/17/2007US7205190 Semiconductor device fabrication method
04/17/2007US7205189 Method of manufacturing a dual bit flash memory
04/17/2007US7205188 Method for producing high-speed vertical npn bipolar transistors and complementary MOS transistors on a chip
04/17/2007US7205184 Method of crystallizing silicon film and method of manufacturing thin film transistor liquid crystal display
04/17/2007US7205183 Methods of manufacturing thin film transistors using masks to protect the channel regions from impurities while doping a semiconductor layer to form source/drain regions
04/17/2007US7205182 Method of manufacturing semiconductor device
04/17/2007US7205174 Micromechanical actuator with multiple-plane comb electrodes and methods of making
04/17/2007US7205173 Method of fabricating micro-electromechanical systems
04/17/2007US7205165 Method for determining the reliability of dielectric layers
04/17/2007US7205075 Method of forming a vertical memory device with a rectangular trench
04/17/2007US7205033 Method for forming polycrystalline silicon film of polycrystalline silicon TFT
04/17/2007US7205019 Electroluminescence displaying; electrolytic cells; preferential doping at interface between electrode and light emitter using photoresists
04/17/2007US7204934 Forming a hard mask over the substrate and etching a trench in the substrate using the hard mask, and forming a dielectric layer over the hard mask and in the trench, where the dielectric layer lines the trench, conductive material is then applied over the dielectric layer, etching to planarize
04/12/2007WO2007041116A1 Patterning oled device electrodes and optical material
04/12/2007WO2007041040A2 Gate dielectric material having reduced metal content
04/12/2007WO2007040627A1 Wavelength-converting light-emitting devices
04/12/2007WO2007040189A1 Magnetic random access memory, and its actuation method
04/12/2007WO2007040167A1 Magnetic random access memory
04/12/2007WO2007040016A1 Solid state imaging device, its manufacturing method, and electronic information device
04/12/2007WO2007039892A2 Microelectronic intercionnect substrate and packaging techniques
04/12/2007WO2007039880A2 Electrostatic discharge protection device
04/12/2007WO2007039333A1 Highly manufacturable sram cells in substrates with hybrid crystal orientation
04/12/2007WO2007039312A1 Arrangement with two transistors and method for the production thereof
04/12/2007WO2006132795A9 A light-emitting device module with a substrate and methods of forming it
04/12/2007WO2006131889A3 Image-taking optimisation device, method and optical component therefor
04/12/2007WO2006130801A3 Tft charge storage memory cell having high-mobility corrugated channel and method of manufacturing the same
04/12/2007WO2006113077A3 Hybrid crystal orientation cmos structure for adaptive well biasing and for power and performance enhancement
04/12/2007WO2006103634A3 Asymmetric high voltage mos device and method of fabrication
04/12/2007WO2006098868A3 Bipolar junction transistor with high beta
04/12/2007WO2006083993A3 Fabrication process for increased capacitance in an embedded dram memory
04/12/2007WO2005079365A3 Complimentary lateral nitride transistors
04/12/2007WO2005065325A3 Optimized contact design for thermosonic bonding of flip-chip devices
04/12/2007WO2004086458A3 Electronic device including a self-assembled monolayer, and a method of fabricating the same
04/12/2007US20070082458 Semiconductor device and method of fabricating the same
04/12/2007US20070082453 Method for making a semiconductor structure using silicon germanium
04/12/2007US20070082443 Method for manufacturing liquid crystal display device
04/12/2007US20070082435 Flat panel display and fabrication method thereof
04/12/2007US20070082430 Semiconductor device and manufacturing method thereof
04/12/2007US20070082424 Fabricating method of a thin film transistor array
04/12/2007US20070082413 Semiconductor memory device with a capacitor formed therein and a method for forming the same
04/12/2007US20070081380 Semiconductor Integrated Circuit
04/12/2007US20070081276 Magnetoresistance effect element, magnetic head, magnetic reproducing apparatus, and magnetic memory
04/12/2007US20070080918 Display device
04/12/2007US20070080917 Display device
04/12/2007US20070080457 Manufacturing method for semiconductor device, semiconductor device and semiconductor chip
04/12/2007US20070080424 Well for CMOS imager and method of formation
04/12/2007US20070080421 Memory device having highly integrated cell structure and method of its fabrication
04/12/2007US20070080419 MOS type solid-state image pickup apparatus and method of manufacturing the same
04/12/2007US20070080418 Wafer-level chip-scale package of image sensor and method of manufacturing the same
04/12/2007US20070080413 CMOS image sensor and method for manufacturing the same
04/12/2007US20070080410 Method of forming transistor having recess channel in semiconductor memory, and structure thereof
04/12/2007US20070080402 Semiconductor device and method for manufacturing the same
04/12/2007US20070080400 Low Noise Vertical Variable Gate Control Voltage JFET Device in a BiCMOS Process and Methods to Build this Device
04/12/2007US20070080387 Method and structure for a 1T-RAM bit cell and macro
04/12/2007US20070080386 Dual damascene structure
04/12/2007US20070080380 Self-aligned gate isolation
04/12/2007US20070080376 Solid-state image pickup device, driving method for solid-state image pickup device and image pickup apparatus
04/12/2007US20070080375 Solid-state image sensor and method for producing the same
04/12/2007US20070080373 Semiconductor device and method for manufacturing the same
04/12/2007US20070080336 Image sensors and methods of manufacturing the same
04/12/2007US20070080298 Computer tomograph with optoelectronic data transfer
04/12/2007US20070080283 Image sensing device including image sensor with high dynamic range
04/12/2007US20070080282 Photo detector array
04/12/2007US20070079488 On-chip bypass capacitor and method of manufacturing the same
04/12/2007DE19942692B4 Optoelektronische Mikroelektronikanordnung Optoelectronic microelectronics assembly
04/12/2007DE10335385B4 ROM-Speicherzelle und -Baustein sowie Entwurfsverfahren hierfür ROM memory cell and building block design and method therefor
04/12/2007DE10260185B4 Halbleiterspeicher mit vertikalen Charge-trapping-Speicherzellen und Verfahren zu seiner Herstellung A semiconductor memory with vertical charge-trapping memory cells and methods for its preparation
04/12/2007DE10235447B4 Elektronischer Schalter Electronic switch