Patents
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
03/1985
03/20/1985EP0134620A2 Data processing apparatus and method
03/20/1985EP0134386A2 Method and apparatus for executing object code instructions compiled from a high-level language source
03/20/1985EP0134241A1 System and method for stabilizing asynchronous state machines.
03/19/1985US4506346 Programmable cartridge telephone communication system
03/19/1985US4506326 Apparatus and method for synthesizing a query for accessing a relational data base
03/19/1985US4506325 Reflexive utilization of descriptors to reconstitute computer instructions which are Huffman-like encoded
03/14/1985WO1985001136A1 Processor with depictor-linked microcode and logic circuitry
03/13/1985EP0134000A2 Information processing system
03/12/1985US4504904 Binary logic structure employing programmable logic arrays and useful in microword generation apparatus
03/12/1985US4504903 Central processor with means for suspending instruction operations
03/05/1985US4503495 Data processing system common bus utilization detection logic
03/05/1985US4503494 Non-volatile memory system
03/05/1985US4503492 Apparatus and methods for deriving addresses of data using painters whose values remain unchanged during an execution of a procedure
03/05/1985CA1183610A1 Geographically distributed multiprocessor time-shared communication processing system
03/05/1985CA1183609A1 Man machine interface
02/1985
02/27/1985EP0133477A2 Pipeline-controlled type information processing system
02/26/1985US4502118 Concurrent network of reduction processors for executing programs stored as treelike graphs employing variable-free applicative language codes
02/26/1985US4502116 Multiple processor synchronized halt test arrangement
02/26/1985US4502115 Data processing unit of a microprogram control system for variable length data
02/26/1985US4502111 For use with a data processing system
02/26/1985US4502110 In a data processing system
02/26/1985CA1183275A1 Byte addressable memory for variable length instructions and data
02/26/1985CA1183273A1 Interface mechanism between a pair of processors, such as host and peripheral-controlling processors in data processing systems
02/19/1985US4500959 In a data processing system
02/19/1985US4500958 Memory controller with data rotation arrangement
02/19/1985US4500952 Mechanism for control of address translation by a program using a plurality of translation tables
02/19/1985CA1182927A1 Memory management arrangement for microprocessor systems
02/13/1985EP0132995A2 Controller for controlling access to a plurality of records that can be accessed and changed by several independent processors
02/13/1985EP0132586A2 A method of transferring system data from one set of storage devices to another
02/12/1985US4499604 Digital data processing system for executing instructions containing operation codes belonging to a plurality of operation code sets and names corresponding to name table entries
02/12/1985US4499539 Method and apparatus for limiting allocated data-storage space in a data-storage unit
02/12/1985US4499537 Apparatus for rapid execution of interrupts after the recognition of an interrupt request
02/12/1985US4499535 Digital computer system having descriptors for variable length addressing for a plurality of instruction dialects
02/12/1985CA1182580A1 Physical address developing unit
02/12/1985CA1182579A1 Bus sourcing and shifter control of a central processing unit
02/12/1985CA1182575A1 Method and means for switching system control of cpus
02/12/1985CA1182574A1 Extended control word decoding
02/12/1985CA1182573A1 Method for partitioning mainframe instruction sets to implement microprocessor based emulation thereof
02/05/1985US4498145 Method for assuring atomicity of multi-row update operations in a database system
02/05/1985US4498142 Method for updating a program on a combined program diskette in an interactive text processing system
02/05/1985US4498136 Interrupt processor
02/05/1985US4498132 Data processing system using object-based information and a protection scheme for determining access rights to such information and using multilevel microcode techniques
02/05/1985US4498131 Data processing system having addressing mechanisms for processing object-based information and a protection scheme for determining access rights to such information
01/1985
01/31/1985WO1985000453A1 Data processing system
01/30/1985EP0132381A2 Method of synchronizing the sequence by which a variety of randomly called unrelated activities are executed in a digital processor
01/29/1985US4497023 In a digital processor
01/29/1985US4497021 Microcomputer system operating in multiple modes
01/29/1985CA1181865A1 Microprogrammed control of extended integer instructions through use of a data type field in a central processor unit
01/23/1985EP0132158A2 Method of performing a sequence of related activities in multiple independent digital processors
01/23/1985EP0131658A1 A synchronisation mechanism for a multiprocessing system
01/22/1985US4495570 Processing request allocator for assignment of loads in a distributed processing system
01/22/1985US4495563 Microcomputer having separate access to complete microcode words and partial microcode words
01/22/1985US4495562 Job execution multiplicity control method
01/22/1985CA1181529A1 Micro computer system with selectable operational mode
01/16/1985EP0131148A2 LIFO memory
01/15/1985US4494195 Microinstruction controlled data processor
01/15/1985US4494193 Deadlock detection and resolution scheme
01/15/1985US4494189 Method and means for switching system control of CPUs
01/15/1985US4494188 Method of processing an operating system in a multi-processor system
01/15/1985US4494187 Microcomputer with high speed program memory
01/09/1985EP0130733A2 Multiprocessor system
01/09/1985EP0130593A2 Shared resource lockout apparatus
01/09/1985EP0130381A2 Mechanism for implementing one machine cycle executable branch-on-any-bit-in-any-register instructions in a primitive instruction set computing system
01/09/1985EP0130380A2 Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
01/09/1985EP0130378A2 Mechanism for implementing one machine cycle executable trap instructions in a primitive instruction set computing system
01/09/1985EP0130377A2 Condition register architecture for a primitive instruction set machine
01/09/1985EP0130269A2 Stored program control
01/09/1985EP0130219A1 Method of preparing part program
01/08/1985US4493052 Method and arrangement for the monitored transfer of control signals at interfaces of digital systems
01/08/1985US4493035 Data processor version validation
01/08/1985US4493034 Apparatus and method for an operating system supervisor in a data processing system
01/08/1985US4493033 Data processing system
01/08/1985US4493029 Finite state machine
01/08/1985US4493027 Method of performing a call operation in a digital data processing system having microcode call and return operations
01/08/1985US4493025 Digital data processing system using unique means for comparing operational results and locations at which such results are to be stored
01/08/1985US4493024 Digital data processing system
01/08/1985US4493023 Digital data processing system having unique addressing means and means for identifying and accessing operands
01/08/1985US4493020 Microprogrammed digital data processor employing microinstruction tasking and dynamic register allocation
01/08/1985US4493019 Pipelined microprogrammed digital data processor employing microinstruction tasking
01/08/1985US4492450 Camera with microprocessor
01/08/1985CA1180819A1 Stored-program control machine
01/08/1985CA1180818A1 Microword control system utilizing multiplexed programmable logic arrays
01/02/1985EP0129693A2 Apparatus for switching routine supporting storage stacks
01/02/1985CA1180463A Method and apparatus for hashing cache addresses in a cached disk storage system
01/02/1985CA1180460A Resource granting process and device in a system comprising autonomous data processing units
01/02/1985CA1180459A Distributed data processing in ring-structured networks architected for full duplex peer-to-peer operation of processing stations and uninterruptible transfer of long data records between stations
01/02/1985CA1180457A Pipelined control apparatus with multi-process address storage
01/02/1985CA1180455A Pipelined microprocessor with double bus architecture
01/02/1985CA1180454A Microinstruction substitution mechanism in a control store
01/02/1985CA1180449A Arithmetic unit for use in data processing system
01/01/1985US4491914 Initial program load system
01/01/1985US4491912 Data processing system with improved microsubroutine facility
01/01/1985US4491908 Data processing system
01/01/1985US4491907 Plurality of processors sharing the memory, the arithmetic logic unit and control circuitry all on a single semiconductor chip
12/1984
12/27/1984EP0129432A2 Digital processor
12/27/1984EP0129006A2 Detection and correction of multi-chip synchronization errors
12/27/1984CA1180125A Dual port memory interlock
12/19/1984EP0128754A2 Method for controlling task process and device thereof
12/19/1984EP0128155A1 Virtual machine data processor
12/18/1984US4489429 Programmable calculator with verbal indications of stored programs